Realising true FPGA-based verification

Have you read the recent news? Aldec is adopting Xilinx Virtex UltraScale devices in its seventh-generation Hardware Emulation Solution, HES-7, thereby heralding a great leap in the capability of FPGA-based verification.

Now read on...

Big SoCs
Articles often start with introductory statements of the blindingly obvious, so here's mine: "Today's SoCs are big and complex and it takes a long time to verify them." Ok, that's understood. Now, what can we do about it?

Well, emulation would sure help shorten those verification run times, wouldn't it? Just think what you could achieve by running your simulations thousands of times faster. Hmmmm... it's a pity about the price tag on that emulator, though (they're not called "big-box" emulators for nothing).

What if you could get that valuable emulator speed-up, but without the capital and operating expense associated with the big-box? What if that came from a company with a 30-year experience in verification EDA, rather than just another FPGA board-maker with a couple of scripts, a transactor, and a big marketing budget?

Well, this column is here to tell you that the scale of the latest FPGA technology is making that possible; also that scalable FPGA-based verification has become a serious alternative to big-box emulation.

Putting transactor lipstick on a prototype doesn't make it an emulator
Historically, some verification teams have tried to compensate for lack of emulation by using their FPGA-based prototypes as a substitute. In fact, while running public workshops based on the FPGA-based Prototyping Methodology Manual (FPMM) in 2011/12, I remember presenting in our research findings that over half of prototypers at that time considered that their FPGAs were used for "verification." At the time, perhaps we should have called their activity "FPGA-based verification." Digging deeper, however, it might have been better described as "validation," rather than verification. What's the difference between verification and validation? The source for the best explanation may be lost in time, but I first heard it at a public presentation by ARM, when the speaker said that validation asks "Did we build the right thing?" while verification asks "did we build the thing right?" Do you see the difference?

FPGA-based prototypes are excellent not only for validation, but also as platforms for early software development and in-field trials; however, they are not really verification platforms (i.e., a prototype is not the same as an emulator).

There are significant technical differences between using FPGAs for prototyping and using them for emulation, as summarised in the table, and dual-purpose FPGA systems that are good for both tasks have been rare indeed.

This doesn't mean that FPGAs cannot be used for emulation or for accelerating our simulation runs; however, attempting to re-purpose an existing collection of FPGA prototype boards as an emulator is not likely to impress anybody.

Are dual-purpose FPGA platforms a realistic expectation?
Dual-use FPGA hardware requires considerable design effort and planning, but the reward is a platform that can take its place at the heart of a prototype or a verification environment equally well. For example, by adding significant amounts of tightly-coupled memory onto the platform, Aldec remove the dependency on internal FPGA memory or add-on cards; this memory is then useful for deep buffering of instrumentation data in a prototype mode, or for modelling different kinds of SoC memory in emulation mode.