Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > FPGAs/PLDs
?
?
FPGAs/PLDs??

Altera touts next-gen high-end programmable logic devices

Posted: 10 Jun 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Altera? logic device? FPGA? SoC? data centre?

Altera Corp. has announced the architectural and product details of its Stratix 10 FPGAs and SoCs. According to the company, the next generation high-end programmable logic devices can deliver breakthrough levels of performance, integration, density and security.

Stratix 10 FPGAs and SoCs leverage Altera's HyperFlex FPGA fabric architecture built on the Intel 14nm Tri-Gate process to provide 2X higher core performance over previous generation FPGAs. Combining the company's FPGA solution with advanced embedded processing capabilities, GPU-class floating point computation performance and heterogeneous 3D SiP integration, enables Altera customers to uniquely address design challenges in the next generation of communications, data centre, IoT infrastructure, military and high-performance computing systems, indicated the company.

HyperFlex Architecture 'Registers Everywhere' Approach

Stratix 10 FPGAs and SoCs are the first Altera devices to leverage the company's HyperFlex architecture, the FPGA industry's most significant fabric architecture innovation in over a decade, stated the company. The HyperFlex architecture, along with a full process node advantage from the Intel 14nm Tri-Gate process, provides a 2X core logic frequency improvement over competing next-generation high-end FPGAs.

Altera Stratix 10

The HyperFlex architecture introduces registers throughout all core interconnect routing segments, enabling Stratix 10 FPGAs and SoCs to benefit from proven performance-enhancing design techniques such as register retiming, pipelining and other design optimisation techniques. These design techniques are not practical in conventional FPGA architectures. The HyperFlex architecture allows designers to eliminate critical paths and routing delays, and rapidly close timing on their designs. The ability to achieve 2X higher core logic performance also enables dramatic improvements in device utilisation and power by reducing the need for very wide data paths and other skew-inducing design constructs required by competing architectures. The HyperFlex architecture enables high-performance designs to operate up to 70 per cent lower power by reducing logic area requirements.

A New Era of Heterogeneous 3D System-in-Package Integration

All members of the Stratix 10 FPGA and SoC family leverage heterogeneous 3D SiP integration to efficiently and economically integrate a high-density monolithic FPGA core fabric (up to 5.5M logic elements) with other advanced components, thereby increasing the scalability and flexibility of Stratix 10 FPGAs and SoCs. A monolithic core fabric maximises device utilisation and performance by avoiding the connectivity issues of competing homogeneous devices that use multiple FPGA die to deliver higher densities. Altera's heterogeneous SiP integration is enabled through the use of Intel's proprietary Embedded Multi-die Interconnect Bridge (EMIB) technology, which provides higher performance, reduced complexity, lower cost and enhanced signal integrity compared to interposer-based approaches, the company detailed.

1???2?Next Page?Last Page



Article Comments - Altera touts next-gen high-end progr...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top