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Altera touts next-gen high-end programmable logic devices

Posted: 10 Jun 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Altera? logic device? FPGA? SoC? data centre?

Initial Stratix 10 devices will use EMIB to integrate high-speed serial transceiver and protocol tiles with monolithic core logic. Implementing high-speed protocols and transceivers through a heterogeneous 3D SiP approach will allow Altera to rapidly deliver Stratix 10 device variants that address evolving market demands. For example, the use of heterogeneous 3D SiP integration provides Stratix 10 devices a path to support higher transceiver rates (56Gb/s), emerging modulation formats (PAM-4), communications standards (PCIe Gen4, Multi-Port Ethernet), and other capabilities such as analogue or high-bandwidth memory.

All densities in the Stratix 10 family will be available with an integrated 64bit ARM quad-core Cortex-A53 hard processor system (HPS) with a rich feature set of peripherals, including a system memory management unit, external memory controllers and high-speed communication interfaces. With Stratix 10 SoCs, Altera will extend its industry leadership position as the only vendor to offer high-end SoC FPGAs. This versatile computing platform offers exceptional adaptability, performance, power efficiency, system integration and design productivity for a broad range of high-performance applications. Architects can leverage Stratix 10 SoCs in high-performance systems to enable hardware virtualisation, while adding management and monitoring capabilities, such as acceleration pre-processing, remote update and debug, configuration and system performance monitoring.

Maximum Design Protection with Comprehensive Security Capabilities

Stratix 10 FPGAs and SoCs will feature the industry's most comprehensive security capabilities in a high-performance FPGA. At its core is an innovative Secure Design Manager (SDM), which delivers sector-based authentication and encryption, multi-factor authentication and physically unclonable function (PUF) technology. Altera has partnered with Athena Group and IntrinsicID to deliver world-class encryption acceleration and PUF IP for Stratix 10 FPGAs and SoCs. This level of security makes Stratix 10 FPGAs and SoCs an ideal solution for use in military, cloud security and IoT infrastructure, where multi-layered security and partitioned IP protection are paramount.

Enpirion PowerSoCs Optimized for Stratix 10 FPGAs and SoCs

Stratix 10 FPGAs and SoCs are supported by Altera's portfolio of Enpirion PowerSoC power solutions. Enpirion PowerSoCs are optimised to meet stringent performance and power requirements while offering high efficiency in the smallest footprint.

Industry's Fastest Timing Closure for Multi-million LE Designs

Altera's Spectra-Q engine within the Quartus II software is designed to maximize the performance, power, and area saving benefits the HyperFlex architecture provides, while improving designer productivity and time-to-market for Stratix 10 FPGAs and SoCs. The Quartus II software extends Altera's software leadership with new capabilities that will deliver up to 8X compile time improvements, versatile and fast-tracked design entry, drop-in IP integration, and support for OpenCL and other higher-level design flows.

Customers can get started on their Stratix 10 designs today using the Fast Forward Compile performance evaluation tools. Engineering samples of Stratix 10 FPGAs and SoCs will be available in the fall of 2015. Embedded software developers can leverage SoC virtual platforms from Mentor Graphics to accelerate Stratix 10 SoC embedded software development.


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