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10nm node offers lower gate costs

Posted: 16 Jun 2015 ?? ?Print Version ?Bookmark and Share

Keywords:10nm? 20nm? CMOS? FinFET?

The expectation is that 10nm will be a high volume and long lifetime technology node. TSMC and Samsung are projecting risk production for 10nm in Q4/2015, and the customer target is clearly Apple. If there is the ability to ramp up 10nm in 2016 or even in mid-2017, 16/14nm will be a short lifetime technology node.

The capital expenditure required for 10nm, however, is approximately $2 billion for 10,000 WPM, and a facility running 40,000 WPM will cost $8 billion. Also, the minimum cost for a design at 10nm will be $150 million, so if revenues for a chip need to be 10 times higher than design costs to get a good return on the investment, 10nm chips will need to achieve sales of $1.5 billion.

After 10nm, there will likely be the need for extreme ultraviolet (EUV) technology, and there is steady progress on enhancing EUV throughput. While 450mm wafer technology continues to be worked on, its introduction will not likely occur before 2020.

- Handel Jones
??EE Times U.S./founder and CEO
??International Business Strategies Inc.

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