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Dissecting FD-SOI: Understanding the risks and opportunities

Posted: 09 Jul 2015 ?? ?Print Version ?Bookmark and Share

Keywords:CEA-Leti? FD-SOI? mobility? IoT? FinFET?

As a reporter, I've never covered a technology that generates more geographically-divided perceptions, innuendo and controversy among semiconductor engineers than FD-SOI.

You'd think that if the choice is a matter of science, engineers would simply pick the one that works better.

However, as with anything in engineering life, choice always involves trade-offs among power, performance, cost, technology readiness, and market-timing.

Paul Boudre

Paul Boudre, CEO of Soitec

Perhaps more important, if you're opting for a less-travelled road (not following your competitors), your decision will involve greater risks. It will impact your company's future and your own career.

Paul Boudre, CEO of Soitec, stated, "Evidence [for FD-SOI's advantages] is there. But some choose not to see it."

To be fair, FD-SOI is a technology three decades in the making and perfecting. FD-SOI's genuine advantage wasn't obvious at process nodes such as 40nm or 32nm, but "we are seeing a window [of opportunity] now at 28nm node," said Marie-Noelle Semeria, CEA-Leti CEO.

Marie-Noelle Semeria

Marie-Noelle Semeria, CEA-Leti CEO

As "small things that are highly connected" become the focus of innovation for mobility and IoT, she explained FD-SOI is a critical ingredient that enables low-power, low-cost, connected miniature products.

EE Times has collected the most frequently asked questions on FD-SOI (and the industry's common perceptions on FD-SOI). Responses reflect the testimony of FD-SOI advocates.


FD-SOI proponents assure fast yield ramp-up (Source: Samsung)

1. Why isn't Intel doing FD-SOI?

Technology migration history

Technology migration history (Source: Samsung)

As Soitec CEO Boudre has travelled the world in the last several years, he said he has met with every potential fabless chip company who would benefit from FD-SOI. Literally, there are no stones unturned as "we meet with customers of our customers [foundries]," he said.

At the end of every meeting, though, Boudre has to field the inevitable question: "If FD-SOI is so good, why isn't Intel doing it?"

It's important to note that FD-SOI isn't some new process technology that popped up recently as an anti-FinFET contender.

Chenming Hu, professor of microelectronics at University of California, Berkeley, wrote papers on FinFETs and ultra-thin body silicon on insulator (UTB-SOI) as early as the late 1990's. Hu, CTO of TSMC between 2001 and 2004, recently wrote in Advanced Substrate News, "When we first invented the [FD-SOI] concept in 2000, the availability of SOI substrates [that requires a very thin top layer of silicon] was the major obstacle. The final silicon layer thickness had to be about a quarter to a third of the gate length."

As an integrated device manufacturer, Intel had to make a choice in 2004 between FinFET or planar FD-SOI. At that point, FD-SOI wasn't even a real choice.

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