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Synopsys DesignWare IP now compliant on TSMC's 16FF+ process

Posted: 31 Jul 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? TSMC? 16FF+? compliance? DesignWare IP?

Synopsys Inc. has achieved certification for a range of DesignWare IP on the TSMC 16nm FinFET Plus (16FF+) process including USB 2.0 and USB 3.0, PCI Express 3.1, HDMI 2.0, MIPI D-PHYSM and Serial ATA (SATA) IP solutions. The IP have passed all the required tests for certification and compliance through independent authorised test centres sponsored by USB-IF, PCI-SIG Interoperability Workshops, HDMI Licensing, LLC and SATA-IO standards organisations.

"Synopsys' availability of Certified DesignWare IP on TSMC's 16FF+ process further demonstrates its commitment to providing high-quality IP solutions that help designers speed development of SoCs on TSMC's advanced FinFET processes," said Suk Lee, TSMC senior director, design infrastructure marketing division. "With silicon-proven DesignWare IP for TSMC's 16FF+ process technology, designers can benefit from the performance, power and area advantages of our process while reducing integration risk and delivering differentiated products to the market faster."

"As a member of USB-IF for close to 20 years, Synopsys continues to actively drive and promote the adoption of the USB interface," said Jeff Ravencraft, USB-IF president and COO. "The certification of the Synopsys DesignWare IP for USB demonstrates that it meets all interoperability tests and functions as expected, enabling designers to integrate the USB interface into their SoCs with confidence."

"We are pleased that Synopsys' DesignWare IP for PCIe 3.1 technology has passed compliance testing," said Al Yanes, PCI-SIG chair and president. "Companies such as Synopsys that participate in PCIe compliance testing help ensure interoperability, contribute to the continued expansion of the PCIe ecosystem and ultimately increase I/O performance for the next-generation of devices."

"Synopsys' DesignWare HDMI IP solution passed the stringent requirements of the HDMI 2.0 Compliance Test Specification at the GRL-Philips Authorized Test Centre," said Quintin Anderson, co-founder and COO at Granite River Labs. "Passing compliance gives designers confidence that the HDMI IP in the TSMC 16FF+ process is robust and interoperable, while supporting the latest functionalities of the HDMI 2.0 standard."

The DesignWare Controller, PHY and Verification IP for USB, PCI Express technology, HDMI, SATA and MIPI D-PHY IP on the TSMC 16FF+ process are available.





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