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Cheaper, denser NAND need better ECC

Posted: 07 Aug 2015 ?? ?Print Version ?Bookmark and Share

Keywords:solid-state drives? error correction codes? Bose-Chaudhuri-Hocquenghem? NAND flash?

The popularity of solid-state drives (SSDs) have grown phenomenally as their prices dropped, driven by ever-diminishing NAND flash costs, but this less expensive and denser NAND flash requires better error correction codes (ECCs) in SSD controllers.

Traditionally, Bose-Chaudhuri-Hocquenghem (BCH) codes were used. They were more than adequate for large geometry NAND flash. However, cheaper and denser SSDs means BCH is no longer adequate and the search for alternatives has led most controller vendors to settle on low-density parity check (LDPC) codes.

There are several reasons why we are transitioning from BCH to LDPC, but they can all be boiled down to this: LDPC codes allow you to correct more errors for the same ratio of user data to ECC parity. The second part of this last sentence is really important. We don't want to increase the number of ECC parity bits in SSDs because this leads to nasty things like write amplification (WA), format inefficiencies and increase costs.

So why didn't we just use LDPC codes right from the start if they're so good? There are several reasons:
???Although LDPC codes were first proposed by Robert Gallagher in the 1960s, their true power was not realised until the 1990s after NAND flash was already being deployed with BCH codes.
???The circuits that decode LDPC codes tend to be larger and consume more power than their equivalents for BCH codes. Shrinking lithography for the controllers made power less of an issue.
???LDPC codes only really shine when you can extract something called soft information from the NAND flash, and this has only become viable in the latest generations of NAND technology.

Today there are no more excuses, so we are seeing many SSD controllers coming to the market with LDPC codes integrated into them. This is allowing us to think about SSDs in some new ways.

LDPC for SSD endurance
One very obvious benefit of the transition from BCH codes to LDPC codes is it enables the controller to extend the life of the SSD. NAND flash wears out over program-erase (PE) cycles. For example, LDPC codes allow us to take the flash to 5,000 PE cycles rather than 1,000 PE cycles; we can implement a SSD with a 500% improvement in endurance with no change in NAND flash.

Figure: Flash errors increase with Program-Erase cycles. LDPC can correct more errors per page than BCH and can therefore keep the flash alive for longer. This results in higher endurance SSDs.

LDPC for SSD capacity
A slightly less obvious benefit of the transition from BCH codes to LDPC codes is it allows us to increase the number of errors on a flash page. Why increase the number of errors on a flash page? Because it enables less expensive, higher endurance SSDs.

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