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Memory/Storage??

Cheaper, denser NAND need better ECC

Posted: 07 Aug 2015 ?? ?Print Version ?Bookmark and Share

Keywords:solid-state drives? error correction codes? Bose-Chaudhuri-Hocquenghem? NAND flash?

Where this gets interesting is if you can increase the number of pages on the NAND flash in exchange for accepting more errors per page. This is exactly what happens when you make the shift from MLC NAND flash to TLC NAND flash. TLC NAND flash has 50% more pages than MLC NAND flash and 150% more pages than SLC NAND flash and can therefore offer significant savings in terms of $/GB. However, you pay a price in terms of errors per page, but for certain applications that might be acceptable. The transition from BCH codes to LDPC codes is enabling the TLC NAND flash market and helping to drive the $/GB for NAND flash even lower.

LDPC for SSD latency
If there is one thing enterprise and data centre customers care about in their SSDs, it is latency. In some applications latency, and consistency of latency, is paramount. The use of LDPC codes is helping SSD controllers manage latency and latency outliers.

The migration from BCH codes to LDPC codes will enable a lot of great things inside SSDs. Some of these things are pretty obvious, such as better endurance, while somelatency control, for instanceare a bit less obvious. Others are pretty ambitious: SSDs whose properties change over the course of the day. It is going to be interesting to see how this all plays out as this technology starts to become pervasive and how software defined flash may come to play a role in how SSDs are deployed in enterprise and data centre environments.

About the author
Stephen Bates is with PMC-Sierra.


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