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Grasp power MOSFET based on superjunction tech

Posted: 18 Aug 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Power MOSFETs? superjunction? AC/DC power supplies? inverters? EMI?

Table 2 shows another comparison, this time for 500 V devices. The planar MOSFET has a 125 m? typical RDS(on) rating. The die is large, in fact the largest die that can fit into a TO-247 package. This can be compared with a superjunction device in the smaller, isolated thin lead TO-220F package, which offers the same RDS(on) but better specifications on every parameter except UIS ruggedness. It should be noted that Vishay is quite conservative in derating the inductive switching specifications. A 100% derating factor is applied on the measured failure current, which translates to a derating factor of four for UIS energy Eas.

Figure 4 defines the capacitances for which the charge specifications are provided. For the two 600 V devices compared above, the capacitance curves are shown in figure 5. Note that the capacitance scale is logarithmic.

Figure 4: MOSFET Capacitance Definitions.

Figure 5: Capacitance Comparison for Planar and Superjunction MOSFETs.

Gate charge considerations
In any switching circuit the gate drive design is a trade-off between switching speed and noise. Superjunction devices offer high switching speeds at high voltages, which also demand extra attention to drive design. Poor design may cause voltage spikes, erratic switching, and higher EMI. Another major concern with ultra-low capacitances is an increased sensitivity to coupling and noise, which shows up as gate source oscillation. Designers are then forced to slow down the switching speed by introducing high gate resistances or low drive currents, which ultimately reduce the system efficiency.

The mechanics of power MOSFET turn on and off behaviour has been studied in detail, [1], [2]. In high voltage applications the rise and fall times of MOSFET Vds require special attention. Typically, the Qgd of a MOSFET can be used for estimating the VDS voltage rise and fall times during switching. Assuming a constant current source driving the gate, tvfall = Qgd / Igon and tvrise = Qgd / Igoff. This simple model cannot be used for superjunction devices, whose structure and switching behaviours are more complex.

As an example, figure 6 shows the gate charge curve for a superjunction device with a VDS curve superposed on it. One feature of superjunction MOSFETs when compared to planar devices is the wide variations in their capacitances as a function of VDS. In a superjunction MOSFET, because of the 100:1 drop in Crss from 0 V to 600 V, the observed switching durations will appear to be much smaller than those estimated from the datasheet values of Qgd.

While there is no analytical method to predict the actual transition times, which in turn depend on application conditions, designers should be aware that good switching performance can be achieved with lower gate drive currents. This translates into smaller and lower-cost gate drivers compared to those used for planar MOSFETs.

Figure 6: Gate Charge vs. VDS for a superjunction MOSFET.

Figure 7: Capacitance and Stored Energy vs. VDS for a superjunction MOSFET.

Coss, Co(tr), Co(er), and Eoss

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