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Examining the most underrated FPGA design tool ever

Posted: 22 Sep 2015 ?? ?Print Version ?Bookmark and Share

Keywords:FPGAs? high level design? OpenCL? MATLAB? VHDL?

Floating-point removes this burden on the designer, andfor some newer applications, such as advanced radar processing, MIMO based communications systems (5G), and datacenter accelerationfloating-point is a must.

Floating-point can be implemented using soft logic, and no tool does a better job of supported this capability than DSP Builder, with seven different floating-point formats. However, widespread use of floating-point in high GFLOPS applications requires that floating-point operators be hardened, rather than being implemented in programmable logic. Modern FPGA architectures now support floating-point adders and multipliers in the DSP blocks. This capability is very difficult to leverage on a wide scale using traditional FPGA design entry, but using DSP Builderwhich comes equipped with a number of high GFLOPS example designsit is as easy and natural to use as fixed-point.

Figure 6: Selectable data type formats; fixed- and floating-point.

Figure 7: Math functions using fixed-point types.

Figure 8: Range of floating-point precisions optimised for device features, thereby enabling users to choose the right trade-off of precision against hardware resources for their applications.

Support for vector manipulation
Native support for vectors in a high level design flow is essential to enable "super-sample rate" designs, where the data rate is much higher than the FPGA clock rate, as the samples must be processed in parallel. The design tool has to provide not just vector data types, but the ability to manipulate vectors C vector sums, vector accumulation, vector dot product, vector cross products and so forth.

Figure 9: Multiple phases automatically managed at data rates higher than the FPGA clock rate.

Figure 10: A 'super-sample' FFT processing 128 complex (real and imaginary) data samples per clock cycle.

For FPGAs to act as accelerators to high performance CPUs, vector support is fundamental to for highly parallel algorithms, with a focus on linear algebra.

Math.h library
Along with native floating-point support comes the need for math functions. DSP Builder provides a full complement of math functions using underlying algorithms that are specifically designed for efficient FPGA implementation.

Figure 11: DSP Builder provides a full complement of math functions using underlying algorithms that are specifically designed for efficient FPGA implementation.


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