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MEMS design, manufacturing on the microscale

Posted: 05 Oct 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Microelectromechanical systems? MEMS? surface micro-machining? moulding? LVS?

Linear, iterative design flows can quickly become a time sink for a MEMS design team. Structured design flows that efficiently exchange information between the schematics, process flows, layout, 3D finite element analysis (FEA) and boundary element analysis (BEA), and package analysis can allow the MEMS designer to exchange information with process, design, electronics, packaging, integration, and software engineers.

Verification of MEMS devices also requires somewhat of a departure from traditional IC design verification. The IC world typically uses layout vs. schematic (LVS) comparison and design rule checking (DRC) techniques for physical verification. Just like traditional ICs, DRC is a necessary step for MEMS devices to validate that a particular design can be manufactured in the targeted process. However, the structures encountered in a MEMS design can differ dramatically from traditional circuits. A typical MEMS design will have curved geometries, Bzier curves, and a variety of all-angled layouts. Fortunately, by using advanced physical verification technologies like equation-based DRC, rules can be written that accurately describe real design errors by translating the curves into a gridded structure like GDSII.

LVS is a different paradigm, due to the inherent 3D nature of the design. Many MEMS designers go right to physical implementation and do not develop a "schematic." Therefore, one of the main functions of LVS, which is to compare the schematic against the layout, is not required. However, the first action of LVS is to "extract" the layout and develop a device and connectivity model of the entire design. This step requires the LVS tool to recognise the complex 3D structures that exist in the design, and differentiate those from the structures, wires, etc. that connect the devices to each other, to electrical sensors, and to the outside world. This electrical and connectivity model is necessary for MEMS verification because it enables other downstream functions, such as parasitic extraction (PEX), and ultimately, circuit simulation. By leveraging the capabilities of new reliability verification tools that can link together the ability to perform circuit classification, physical layout measurements, complex calculations, and rule-driven circuit checking, the specific curvatures of the devices and interconnects can be verified against the designer's intent.

Speaking of PEX, simulating MEMS device behaviour reveals another verification challenge. Traditional PEX tools are rule-based or table-based methodologies, and are developed with certain assumptions about the physical layout. These tools are developed to support the interconnect that exists in IC designs; therefore, they are optimised for rectilinear geometries and parallel and orthogonal routes. These assumptions fail when the PEX tool encounters the complex geometries found in MEMS designs. MEMS circuits require the type of accuracy that is only available from a field solver. Advanced extraction solutions that combine true field solver technology with the performance and scaling of modern parasitic extraction tools must be used if designers want to achieve the verification accuracy required for these MEMS circuits while maintaining targeted tape-out cycles.

Testing requirements also differ considerably. Traditional ICs typically use a single generic tester for most electrical tests. MEMS devices normally require a series of tests, which can include physical stimuli such as mechanical shock, variable frequency vibration testing, and temperature cycling. Standard qualification tests such as high and low temperature operating life ensure long-term reliability.

Foundries must provide standardised MEMS processes, and collaborate with fabless MEMS design houses, to meet time-to-market and high-volume production demands. Designers also need process design kits, MEMS IP libraries, and reference flows from foundries. Test engineers need to incorporate appropriate environmental tests. In short, the changing MEMS market calls for nothing less than a new silicon and software ecosystemmuch of it based on the fabless model familiar to IC design companiesto enable designers to turn out products for the cost-driven, high-volume consumer market.

By integrating the power of mechanical and optical functions with silicon, MEMS devices can add significant functionality without the need for transistor scaling. However, the success of integrated chips will depend in large part on the ability of the industry to ensure reliable, cost-efficient products can be produced in high volume in a timely manner. That goal, in turn, depends on the ability of the foundries and EDA vendors to provide the designers with the processes, data, and tools they need to create integrated ICs that combine the advantages of MEMS and silicon circuitry to satisfy the growing market demand.

About the authors
Carey Robertson is a Director of product marketing at Mentor Graphics Corp., overseeing the marketing activities for Calibre PERC, LVS and extraction products. He has been with Mentor Graphics for 15 years in various product and technical marketing roles. Prior to Mentor Graphics, Carey was a design engineer at Digital Equipment Corp., working on microprocessor design. Carey holds a BS from Stanford University and an MS from UC Berkeley.

Khaled AbouZeid is a technical marketing engineer in the Design-to-Silicon division of Mentor Graphics Corp., focusing on Calibre parasitic extraction technologies and MEMS EDA solutions. He has more than four years of experience in digital signoff and MEMS extraction, with in-depth knowledge of behavioural modelling, design, and manufacturing of MEMS mechanical sensors and actuators. Khaled holds a B.S. in Electrical Engineering and M.Eng. in Microelectronics System Design.

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