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Low-jitter clock generators boost reliability in telco apps

Posted: 06 Oct 2015 ?? ?Print Version ?Bookmark and Share

Keywords:Texas Instruments? clock generator? telecommunications? server? LDO?

Texas Instruments (TI) has uncloaked a line-up of clock generators that offers jitter down to 100fs and provides flexible, unique pin control options. In contrast to conventional reference clock solutions, the LMK033x8 has a jitter performance that allows system designers to optimise system timing margins and bit error rate (BER) to cut data transmission errors, enabling more reliable communications, networking, server, computing, and high-performance industrial equipment, stated the company.

The clock generators claim to offer versatile features to reduce design cycle time by facilitating easy prototype design and evaluation. The devices feature up to two high-performance PLLatinum fractional-N phase-locked loops (PLLs) with eight outputs to enable ultra-low jitter performance of 100fs root mean square (RMS) over multiple integration bandwidths (1kHz to 5MHz and 12kHz to 20MHz). Designers can take advantage of the ultra-low jitter to improve their system BER and increase the reliability of their telecommunications infrastructure equipment, TI noted.

In addition, there is a unique pin-mode control feature that enables designers to easily select from 71 pre-programmed frequency startup plans compared to one-time programmable memory offered by competitors. Integrated electrically erasable programmable read-only memory (EEPROM) enables easy customisation, while the I2C interface gives system designers complete control of device configuration.


Glitchless fine/coarse frequency margining enables designers to simplify the stress and compliance testing of their systems during design verification and process verification (DVT/PVT) of prototypes. Also, integrated low-dropout regulators (LDOs) provide immunity to power-supply noise without requiring complex filter designs, added the company.

Evaluation modules (EVMs) enable designers to quickly and easily evaluate the devices. The LMK03328EVM is available, while the LMK03318EVM will be available in 4Q15 from TI store and authorised distributors for $299.

TI's WEBENCH Clock Architect tool simplifies the design process for the LMK033x8 family, as well as for other TI clock and timing devices. The tool can recommend a single- or multiple-device clock-tree solution from a broad database of devices to meet system requirements. It features PLL filter design, phase-noise simulation, and the ability for designers to optimize clock-tree designs for their performance and cost requirements.

LMK033x8 clock generators come in a 7mm x 7mm QFN package. The LMK03328 dual-PLL eight-output clock generator is available at $10 in 1,000-unit quantities (1ku). The LMK03318 single-PLL eight-output clock generator will be available in 4Q15 and will be priced at $7.50 in 1ku.

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