Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Emulation vs prototyping: The performance crossover

Posted: 05 Feb 2016 ?? ?Print Version ?Bookmark and Share

Keywords:emulation? FPGA? prototyping? place-and-route? debug?

For verifying complex hardware designs and validating systems with large software components, there are two leading technologies: emulation and FPGA-based prototyping. Architecturally, these tools are quite different, but the overlap in their capabilities and applications invariably invites some form of comparison.

As the "big iron" of the verification world, emulators boast muscular chassis wrapped in heavy cables and accompanied by hefty price tags. Cost, in fact, has been the primary knock against emulators. But these systems are quick to bring-up and quick to turn around when processing design changes. Emulators are also recognised for their strong debug capabilities that are comparable to those of software simulators.

Standing alongside an emulator, an FPGA-based prototype can appear small and lightweight. Often the province of one or two engineers, these systems are modestly priced as compared to their big-iron counterparts. Where FPGA-based prototypes shine is speed. While emulators can reach speeds of up to 1MHz, they often have to settle for 500kHz or so. Prototypes blow past this handily, regularly clocking in between 10 to 50MHz, with some approaching 100MHz.

The big drawback to FPGA-based prototypes is that it can take a long time to bring one up. It's not uncommon for these efforts to take from two weeks to two months or more. Moreover, prototypes can incur long FPGA place-and-route times when iterating the design, and are typically much weaker than emulators at hardware debug.

The pros and cons of these systems are debated endlessly, often as hallway discussions supported by much anecdotal evidence and arm waving, yet the irony is that emulation and FPGA-based prototyping are the yin and yang of the verification worldSiamese Twins joined at the point where their performance curves cross over.

Performance crossover is a straightforward analysis, occurring when two systems have different operational speeds and ramp-up times. The performance curves for emulators and FPGA-based prototypes are developed from the metrics of system speed, bring-up time, and time per unit test. Admittedly, this is a simple analysis, and it omits a host of factors such as turn-around time, debug effort, reusability, and other considerations. Nevertheless, performance crossover analysis can be quite revealing and insightful.

One surprising find is that the crossover point occurs so quicklyeven if the prototype is months behind. This fact removes much of the concern regarding long bring-up times. Any effect of bring-up delay disappears as the test and development effort continues.

1???2?Next Page?Last Page

Article Comments - Emulation vs prototyping: The perfor...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top