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Emulation vs prototyping: The performance crossover

Posted: 05 Feb 2016 ?? ?Print Version ?Bookmark and Share

Keywords:emulation? FPGA? prototyping? place-and-route? debug?

The other revelation is how dramatically the performance gap grows. The difference in performance is particularly steep when prototype replicates (copies) are used in parallel. The cost advantage that FPGA-based prototypes enjoytypically 5 to 1allows multiple platforms to be deployed, thereby accelerating overall performance.

To examine this for yourself, take a look at this Performance Crossover Calculator. The calculator lets you run your own analysis by entering numbers for system speed, bring-up time, unit test time, as well as cost per gate. The resulting graph plots the number of tests run against time, and displays performance crossover data for elapsed hours as well as days.

As Deming famously said: "Without data, you're just another person with an opinion." This analysis lends metrics to a discussion that previously has gone without. As you simulate various combinations of parameters, you will see that results beyond the crossover point become quite compelling for FPGA-based prototypes, especially when unit test times are long or the number of test runs is increased.

Now, if you think all of this makes a case for FPGA-based prototyping in lieu of emulationit doesn't. There's no arguing against the tried-and-true methodology of emulation. The inherent strengths of emulators are well-suited to system integration efforts and rigorous verification testing. In fact, the direct results of performing emulation are designs that stabilise and mature more quickly. This in turn precipitates a shift from verifying hardware elements to validating software components.

When this change in focus occurs, FPGA-based prototypes become the natural platform to pick up the pace of validation and further drive software development. Performance crossover analysis serves as an aid in determining when to make that shift, and why. Ultimately, this is a powerful demonstration of how emulation and FPGA-based prototypes are complementary toolsnot despite their performance crossover, but because of it.

About the author
Ron Green is the technical communications manager with S2C Inc. Prior to this, he was with Cadence Design Systems and Altos Design Automation. He has held various positions, including design engineer, AE, technical trainer, and technical writer. He appreciates clever designs, compelling materials, and the espressos at Mr. Toots Coffeehouse.


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