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The endless pursuit of smaller packages

Posted: 15 Mar 2016 ?? ?Print Version ?Bookmark and Share

Keywords:embedded component packaging? ECP? DiP? multichip module? MCM?

At TechInsights, we remain ever ar amazed at the ingenuity of the semiconductor industry to integrate electronic components into ever smaller packages. My early days as a hobbyist had me wiring up individual transistors packaged in the three-lead T-05 metal cans onto perf boards. These discrete transistors were later displaced by 8-pin DiP packages used for the early TTL IC's.

Fast forward a few decades and the package integration is quite impressive. For example, figure 1 shows a Murata antenna switch removed from an Apple 5S smartphone upon teardown. The package measures 3.7 mm by 6.0 mm and contains 6 SAW filters, a Peregrine antenna switch, a power amplifier, and a collection of discrete resistors and capacitors.

These components have been mounted on a FR4-like board and then potted up with a package mold compound to form the finished multichip module (MCM).

Figure 1: Murata Antenna Switch Module with Package Mold Compound Removed.

But this is not the only way to incorporate components into a package as we started to see embedded capacitors in package on package (PoP) applications processors a few years ago. This embedded component packaging (ECP) is one of several competing strategies being used for advanced system in package (SiP) solutions.

Figure 2 is a package photograph of the Apple's co-packaged A9 processor and memory (PoP) and a plan view X-ray image showing embedded capacitors in the package substrate.

The APL1022 package marking seen in the upper right of the package photograph identifies the A9 processor as being fabricated by TSMC. We note that Samsung is also supplying A9's to Apple.

Figure 2: Apple Memory on Processor PoP (left) and Package X-ray (right) (Source: TechInsights' Analysis)

Figure 3 is a SEM cross section of one of the embedded capacitors in the Apple A9 substrate. The substrate appears to comprise three distinct layers: the bottom, middle and top laminates. We suspect the middle laminate has undergone a punch process to form the cavity for the capacitor.

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