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Probing ReRAMs: 3D filaments, brain-like functions

Posted: 16 Mar 2016 ?? ?Print Version ?Bookmark and Share

Keywords:ReRAMs? memory? filament? CMOS?

Figure 4(a) is an example of the pulse integrating circuit which can provide the required response for brain-like function and must be emulated with a single ReRAM, some EE readers will be familiar with this as a type of charge pump.

Figure 4(b) illustrates a simplified version of the characteristics of a ReRAM when a current is applied to a device in its low resistance state (LRS) with an amplitude marginally higher than the value of the compliance current used to achieve the SET (LRS) state. After some delay or incubation time current spikes start to appear; one interpretation of this would be within the filament minor memory SET and RESET process are in competition.

If instead of DC the current is applied in the form of pulses, Figure 4(c), in effect sub-dividing the delay time, then the instant when a spike appears will be a function. of the pulse repetition rate. By using a read pulse of a value that did not interfere significantly with the integration it was possible to monitor the progress towards the appearance of the spike, as illustrated in figure 4(d).

Also demonstrated was a similar technique for noise spikes, which appear prior to the HRS to LRS transition although for threshold switching the effect is less controllable.

The next steps
This is not the end of story of understanding the operation SiOx ReRAM, it is however an interesting example of an innovative effort moving in the right direction. It has provided new insights into the structure of filaments as well as an admirable and innovative use of effects, noise spikes and pre-switching transients which others might see as a problem, to offer the potential to emulate brain-like functions. As well as a full understanding of the physical cause of the noise spike the next steps must be to eliminate the need for forming and determine the ability to geometrically scale the ReRAMs.

The present devices are relatively large with filament diameter of the order 500nm, while the columns of dislocations that allow for the switching effects are reported to be of the order 10 to 50nm. The scaling target for brain-like structures will require dimensions about equal to those of the filament sub-structure columns or less. Whether it is possible to make a device with one column, the ability to scale and maintain all the desired ReRAM device characteristics is a question that must be answered.

The need to form ReRAMs is an ongoing problem irrespective of the potential application, no less so for neuron emulation, removing the need forming must be high on the list of next steps. One suggestion I would like to make is to explore the possibility of growing a thermal oxide and then ion-implanting silicon to create a sub-oxide. The implantation might well be able to create the desired composition and the dislocations in one operation, removing the need for forming and a reliance on the possible scaling limit of using the natural column structure of sputtered sub-oxide films.

It would be nice to now see the future road map of tasks for this ReRAM project driven by the need to create a small scale brain-like function block.

[1] Emulating the electrical activity of the neuron using a silicon oxide RRAM cell, by Adan Mehonic, Anthony Kenyon, Front. Neuroscience. Feb 2016, 10:57. doi: 10.3389/fnins.2016.00057.
[2] Conductance tomography of conductive filaments in intrinsic silicon-rich silica RRAM, by Mark Buckwell,* Luca Montesi, Stephen Hudziak, Adnan Mehonic and Anthony J. Kenyon* Nanoscale, The Royal Society of Chemistry Feb 2015 Nanoscale
[3] Resistive switching in silicon suboxide films, Adnan Mehonic, Sebastien Cueff, Maciej Wojdak, Stephen Hudziak, Olivier Jambois, Christophe Labbe, Blas Garrido, Richard Rizk, and Anthony J. Kenyon, UCL United Kingdom, CIMAP, UMR CNRS 6252 ENSICAEN, France and MIND-IN2UB, Universitat de Barcelona, Barcelona, CAT, Spain
[4] Three-Dimensional Observation of the Conductive Filament in Nanoscaled Resistive Memory Devices, U. Celano, L. Goux, A. Belmonte, K. Opsomer, A. Franquet, A. Schulze, C. Detavernier, O. Richard, H. Bender, M. Jurczak and W. Vandervorst, Nano Letters., 2014, 14, 2401C 2406.

About the author
Ron Neale is an independent electrical/electronic manufacturing professional.

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