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Wake up PSR flyback converters

Posted: 12 May 2016 ?? ?Print Version ?Bookmark and Share

Keywords:Primary-side regulated? PSR? flyback converters? frequency modulation? standby power?

Primary-side regulated (PSR) flyback converters (figure 1) have been a popular choice for reducing standby power in low-power adapters and bias supplies. These controllers have been able to achieve less than 5 mW of no-load standby power by using a frequency modulation (FM), current amplitude modulation (AM) scheme to reduce switching losses and standby power.

A significant problem with this control scheme is that the converter has slow transient response at light loads, which the designer has to overcome by adding more output capacitance to meet hold-up requirements. The technique described will enable PSR flyback designers to design for higher power densities and reduce overall design cost.

Figure 1: Schematic of an offline primary-side regulated flyback converter.

Before discussing how to speed up the PSR flyback converter, let us review the PSR flyback control methodology. The PSR control scheme senses at the VS pin the scaled output voltage (V OUT) through the transformer's auxiliary-turns ratio (N A/NS). This technique eliminates the need for TL431 opto-isolator feedback circuitry. Removing this circuitry reduces your design's standby power by roughly 2.5 to 5 mW. Equation 1 describes the mathematical relationship between VS and V OUT.

PSR controllers use a combination of valley switching, FM and primary peak current (I PP) amplitude modulation to control the duty cycle (D) of a quasi-resonant / discontinuous flyback converter. Equation 2 is a simplified equation describing the D of this offline power converter. Variable t ON is the switch (Q1) on time. Variable tC is the time when the output diode (D G) is conducting and the transformer (T1) is delivering energy to the output of the converter. Variable t D is the dead time adjusted by the PSR controller to then adjust the duty cycle.

The traditional PSR controller feedback circuitry will only sample the voltage on the auxiliary winding (V A) when the transformer is delivering energy to the secondary (during t C). The circuitry will generally take this sample just before the output diode stops conducting current (I DG). After taking the sample, the controller will adjust both IPP and the converter's dead time to set the duty cycle for the switching period (figure 2). These PSR controllers typically operate at switching frequencies from 100kHz (f MAX) at full load down to a minimum switching frequency of 1kHz (f MIN) when the power converter is idle.

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