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2005-04-15 Synopsys, Tower ink 180nm silicon library distribution agreement
Synopsys Inc. is making 180nm silicon libraries from Tower Semiconductor available through Synopsys' DesignWare library, the two companies said Wednesday (April 13).
2013-04-03 Sidense 1T-OTP ready for TSMC's 180nm BCD processes
Sidense 1T-OTP macros has met Sidense's macros has met all the requirements of the IP9000 Assessment program, clearing it for TSMC's 180nm BCD 1.8/5V/HV and G 1.8/5V processes.
2007-06-11 Russia's Mikron teams with ST for 180nm process
JSC Mikron is pushing ahead with its partnership with STMicroelectronics for the 180nm CMOS foundry process.
2010-08-10 Platform tapes out 180nm CMOS bus controller
Synopsys reports the tape out of a complex mixed-signal chip using the company's Galaxy Implementation Platform, including full-chip editing and final chip-finishing tasks.
2011-06-30 NVM solution targets 180nm process tech
Aimed at wireless, RFID, and analog and mixed-signal SoC designs, the DesignWare AEON NVM IP is implemented in standard CMOS process technology with no additional mask or process steps required.
2014-11-03 NVM IP for TowerJazz 180nm SL process tech
The DesignWare AEON FTP Trim NVM IP offers the smallest area for precision analogue IC trimming and sensor calibration, in a similar footprint as OTP solutions with the advantage of reprogrammability.
2013-11-21 Malaysia foundry ready to take X-Fab to 180nm, 130nm
X-Fab Silicon's Rudi De Winter talks to EE Times Europe about his company's acquisition of 1st Silicon in Malaysia and its transition to 200mm wafer manufacturing.
2011-06-09 Design kit supports TSMC's 180nm process
Magma Design Automation has made available the Titan Analog Design Kit for TSMC 180nm and 65nm processes.
2011-09-02 180nm CMOS process targets analog, power ICs
A chip foundry has introduced an analog CMOS process that supports operating voltages up to 24V.
2006-07-12 Toppan Photomasks to expand Shanghai facility
Toppan Photomasks plans to expand its photomask production plant in Shanghai, adding capacity to produce photomasks for 180nm ICs and additional lithography and inspection capacity for products 250nm and above.
2005-01-20 Synopsys develops reference design flow with China's chip foundry
Synopsys Inc. and Grace Semiconductor Mfg Corp., an IC foundry in Shanghai, China, have jointly developed a reference design flow for Grace's 180nm processes.
2005-11-03 Survey: Design in China, Taiwan getting more sophisticated
Seventy-three percent of designers in China and Taiwan are designing ASICs at 180nm or below, an increase of 21 percentage points from 2004, according to the results of an annual study by Global Sources Ltd and Gartner Inc.
2006-10-16 EDA needs productivity, not 'sexy' tech, says exec
EDA needs to shift its focus to providing solutions that emphasize productivity, rather than continuing to focus exclusively on tools aimed at the next technology node.
2002-02-12 DuPont plans to upgrade Shanghai facility
DuPont Photomasks Inc. has revealed plans to upgrade its joint-venture photomask manufacturing facility in Shanghai, China. DuPont will install an advanced manufacturing line for the production of photomasks supporting 0.185m design rules.
2013-09-10 TSMC certifies Synopsis' design solution for 16nm FinFETs
Synopsys' Laker custom design solution provides users with access to a wide range of TSMC process technologies, from 180nm to 16nm.
2004-12-23 Tower, Virage announce NOVeA embedded memories
Tower Semiconductor and Virage Logic Corp. have revealed the availability of Virage Logic's patented nonvolatile electrically alterable (NOVeA) embedded memories for production on Tower Semiconductor's 180nm CMOS logic process.
2004-09-06 Synopsys unveils DesignWare USB 2.0 OTG PHY core
Synopsys introduced its DesignWare USB 2.0 On-The-Go (OTG) PHY (Physical Layer) core targeted at TSMC's 90-, 130- and 180nm processes.
2005-08-25 Rambus, UMC expand process technology licensing pact
Rambus Inc. and United Microelectronics Corp. (UMC) have extended the availability of Rambus' patented PCI Express PHY cells to UMC's 180nm, 150nm and 90nm processes.
2014-05-06 Neurogrid board replicates human brain circuitry
The board comprises 16 180nm-processed CMOS chips paired with a daughterboard and FPGA, and employs a combination of hardware emulation and software simulation to mimic the behaviours of neurons and synapses on the power it takes to run a tablet computer.
2013-03-28 Magnachip qualifies Sidense's memory macros for HV process
Sidense's SLP 1T-OTP macros have been fully qualified for MagnaChip's 180nm 1.8/3.3/18V high-voltage CMOS and mixed-signal process for LED lighting, power management and display controllers.
2014-06-12 IBM bolsters RF foundry with SOI, SiGe
The chipmaker launched additional processes for fabricating RF chips including a 130nm/180nm hybrid SOI and 90nm SiGe BiCMOS, both run in Intel's Burlington fab, which is reportedly up for sale.
2013-06-14 DesignWare HPC Kit expanded for core optimisation
Synopsys' broad portfolio of DesignWare IP includes silicon-proven embedded memory compilers and standard cell libraries that support a range of foundries and processes from 180nm to 28nm.
2007-08-06 Cadence, SMIC team on RF chip design
Cadence and SMIC have collaborated to develop an RF design solution and announced the availability of SMIC RFCMOS 180nm PDK that supports the Cadence RF Design Methodology Kit.
2008-08-13 World's first 3D chip technology surfaces
The world's first 3D chip process is ready for licensing from the fabless semiconductor design house BeSang.
2008-06-02 Working on India's analog dream
Notes Anand Valavi of Wipro Technologies, " We want to get to the point where people think if they have some state-of-the-art analog work to be done, India is a good place to do it."
2008-02-25 Watch out for India, Synopsys exec notes
When it comes to design capacity and capability, India is a powder keg about to explode, notes a Synopsys executive.
2013-06-25 Utilising non-volatile memory IP in SoC designs
Integrating anti-fuse NVM on chip for program storage results to increased margin as well as independence from vagaries of supply chain and component availability.
2011-06-30 USB solution features built-in self-test
Evatronix's USB high speed PHY IP is designed to complement the company's suite of USB 2.0 device and host controllers.
2010-07-01 USB hub cuts chip-to-chip link power consumption
SMSC offers the USB4640, a combination two-port USB 2.0 hub and flash media reader controller that links to a host processor via a patented low-power version of USB 2.0 called HSIC.
2003-12-10 UMC becomes member of X Initiative
Semiconductor foundry United Microelectronics Corp. (UMC) has joined the X Initiative, a semiconductor supply-chain consortium. This makes UMC the first pure-play foundry to become a member of the consortium.
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