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| 2013-04-03 | Sidense 1T-OTP ready for TSMC's 180nm BCD processes Sidense 1T-OTP macros has met Sidense's macros has met all the requirements of the IP9000 Assessment program, clearing it for TSMC's 180nm BCD 1.8/5V/HV and G 1.8/5V processes. |
| 2013-08-02 | 1T-OTP memory IP targets advanced process chip design Sidense SHF 1T-OTP uses include code storage, field-programmable ROM replacement, secure encryption key storage, configuration, fuse replacement, trimming and calibration. |
| 2013-03-28 | Magnachip qualifies Sidense's memory macros for HV process Sidense's SLP 1T-OTP macros have been fully qualified for MagnaChip's 180nm 1.8/3.3/18V high-voltage CMOS and mixed-signal process for LED lighting, power management and display controllers. |
| 2009-04-27 | OTP memory IP tailored for 65nm designs Sidense has released its 1T-OTP one-time programmable (OTP) memory IP for customer designs at the 65nm process node. |
| 2015-03-18 | Kilopass to pay Sidense $5.5M for baseless patent claims U.S. District Judge Susan Illston ordered Kilopass to pay Sidense for its "objectively baseless" patent infringement lawsuit initiated against Sidense to cover attorneys' fees and associated costs. |
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