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2016-04-05 CAD tool for capacitance extraction in image sensor designs
Silicon Frontline Technology released the F3D field solver that allows capacitance extraction of complex 3D large-area structures such as pixels, arrays and precision analogue circuits.
2010-05-11 Why electronics industry needs 3D shift
According to Silicon Frontline's Dermott Lynch, the electronics industry needs innovation in 3D extraction technology to move past the limitations of existing solutions
2013-07-10 UNIST mass produces 3D mesoporous graphene
A team from the Ulsan National Institute of Science and Technology developed a new method to massively synthesise enhanced, yet affordable, materials for supercapacitors.
2008-07-14 Standards for 3D memory chips set
The Intimate Memory Interconnect Standard (IMIS) being promoted by the 3D-IC Alliance recently released its official specification for 3D stacking memory chips
2003-01-31 Motorola ships 3D electric field imaging IC
The company has announced the availability of the MC33794 IC, which assists designers in dealing with 3D electric field imaging
2005-01-14 Magma upgrades 3D field solver
Magma released a new version of its QuickCap 3D field solver capacitance extractor with features to allow the tool to better address design problems that occur in 90nm and smaller process nodes.
2011-12-21 JEDEC to release 3D IC standard
JEDEC will release in late December or early January 2012 the first 3D IC interface standard
2010-03-11 IMEC, Synopsys join hands on 3D stacked ICs
Synopsys Inc. and IMEC have partnered to accelerate the development of 3D stacked IC technologies
2010-12-09 ICs seen to scale via 3D TSV
Chip scaling is becoming harder and costlier entering into the sub-20nm realm, thus, the industry is looking for new materials, structures and processes, says a technologist from Samsung.
2005-02-02 Ethertouch delivers next-generation capacitance sensing chip
Ethertouch's capacitive sensing technology utilizes the capacitance between the human body and a set of sensors to achieve advanced 3D-sensing solutions.
2014-12-04 End of DDR marks surge of 3D, TSV-based memory
Several DRAM memory architectures based on 3D layer stacking and TSV have evolved to accommodate increasing memory requirements spearheaded by Samsung, Hynix and Micron
2014-01-22 Develop sense electrodes for 3D touchpad surfaces
Know the most important design choices that need to be made when designing a touchpad for a 3D surface
2007-06-25 Designing in the age of 3D systems
The optimal utilization of the third dimension requires a careful design of the overall 3D system architecture
2014-06-23 3D integration tech thins down 300mm wafer to 4?m
The length of the wiring between upper- and lower-layer chips in the thinned wafers is reduced to below 1/10 compared to conventional TSVs, with wiring resistance, capacitance, and volume being reduced drastically
2012-09-14 X-Fab claims the first open platform MEMS 3D process
X-Fab's 3-D sensor process is suitable for applications ranging from mobile devices, consumer goods, games and toys, automotive, robotics, industrial and medical equipment.
2004-08-02 Mixed-signal simulation tool supports Linux
Silvaco's mixed-signal simulator, RC inductance extractor and soft-error modeling tool all support Linux under a new GUI.
2015-09-17 Spot IGBT degradation through power cycling
Here is a look at an experiment in which we conducted thermal transient tests from one steady-state to another to determine cause of failure for a small sample of IGBTs.
2004-06-03 Silvaco offers full-chip RC extraction
Silvaco International has released Hipex, which claims "3D accurate" resistance and capacitance (RC) extraction.
2011-02-24 Samsung chief cites challenges facing IC design
IC designers must address power consumption issues, the need for new transistor structure and memory types, delayed development of 3D TSV-based devices, and calls for circuit design breakthroughs
2002-06-28 Motorola adopts Cadence's analog/mixed-signal design solution
Motorola Inc. has adopted Cadence Design Systems Inc.'s full-chip 3D device-level parasitic extraction solution called Assura RCX, for its analog and full-custom design flows
2005-01-17 Magma unveils enhanced version of QuickCap
Magma announced QuickCap NX, an enhanced version of its gold-standard QuickCap parasitic capacitance extraction tool
2015-01-09 Identifying memory trends: Issues, standards and specs
Jennie Grosslight, the memory test product manager at Keysight Technologies, revealed what she thinks will be the prevailing memory trends in 2015.
2015-06-16 Grasping parasitic extraction of FinFETs
Memory chips must meet strict specifications for fast data transfer, reliability, and power consumption, so accurate characterisation is necessary at every stage of design.
2013-04-02 FinFETs still not ready for prime time
Rising capacitance is one of many challenges that lie ahead before a process node that utilises 3D transistors can be realised, according to a panel of experts at the annual Synopsys User Group meeting.
2014-05-05 Exploring Samsung 2x nm LPDDR3 DRAM
Know some of the challenges faced by memory makers as they strive for sub-20 nm devices.
2005-08-11 ESD protection diode answers prayer for board space savings
ON Semi developed dual series of high performance, micro-packaged ESD protection diodes that are is designed to protect voltage sensitive components for two lines in applications that demand minimal board space and low profiles.
2013-07-24 EMC simulation addresses ECU validation issues
A more straightforward validation of electromagnetic compatibility can be achieved by combining tools.
2003-09-16 Design challenges and sign-off criteria in nanometer era
In nanometer era, traditional STA and physical verifications are no longer sufficient. The nanometer sign-off flow must comprise SI-validated analysis engines that account for the interactions of multiple-noise sources.
2013-05-06 Conquering FinFET challenges
Here's a look at the challenges from custom/analogue, digital, parasitic extraction and signoff perspectives.
2003-10-06 Cadence teams with startup for packaging solution
Claiming to offer the industry's first integrated IC packaging design solution, Cadence Design Systems announced the availability of the APE-3D
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