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2015-07-21 Semicon West highlights 10 chip trends
During the recent Semicon West, executives from a number of chip companies discussed the ongoing developments on semiconductors technology.
2012-02-23 Scientists create precise single-atom transistors
The microscopic device has tiny visible markers etched onto its surface, making it possible for the researchers to connect metal contacts and apply a voltage.
2011-02-24 Samsung chief cites challenges facing IC design
IC designers must address power consumption issues, the need for new transistor structure and memory types, delayed development of 3D TSV-based devices, and calls for circuit design breakthroughs.
2004-01-12 Protein recognition tapped to build nanotube FETs
Molecular self-assembly assisted by DNA and protein recognition might provide a route to complex logic and memory circuits built with nanotubes, a project in Haifa, Israel, suggests.
2015-04-21 Moore's law heads toward uncertain future
Although Moore's law has guided the electronics industry, it has begun to fail in many aspects, the most pronounced being clock speed that has been pegged at 3GHz max since about 2004.
2015-05-04 MEMS looks for its Moore's Law
MEMS provide an alternative route to scaling technology beyond Moore's Law that could have advantages in markets such as the Internet of Things.
2012-05-04 Kontron rolls Intel Core i7-based embedded computing platforms
Based on Intel's 22nm 3D tri-gate transistor technology, the processor-based boards offer up to 20 percent enhanced computing power and up to 40 percent higher performance/W compared to the previous generation.
2015-02-25 Intel's 14nm process churns out world's smallest SRAM
The company will describe a 0.0500 ?mm2 SRAM bitcell capable of storing 14.5Mb per mm2, which is part of a memory array that will be widely used in Intel's future SoCs such as cellular modems.
2008-04-08 Intel takes wrap off Centrino Atom, next-gen chips
Intel Corp. has introduced five Atom processors and Centrino Atom processor technology for Mobile Internet Devices (MIDs) and embedded computing solutions.
2004-06-01 For metrology, nano changes everything
International Technology Roadmap for Semiconductors said that the transistor gate length of microprocessors at the 45nm node will be <20nm in 2010
2014-05-05 Exploring Samsung 2x nm LPDDR3 DRAM
Know some of the challenges faced by memory makers as they strive for sub-20 nm devices.
2013-04-02 Designers will jump hurdles to succeed at 14nm node
Chip designers face a number of challenges at 14nm because scaling issues were not addressed by earlier generations, according to experts at the International Symposium on Physical Systems.
2003-09-16 Design challenges and sign-off criteria in nanometer era
In nanometer era, traditional STA and physical verifications are no longer sufficient. The nanometer sign-off flow must comprise SI-validated analysis engines that account for the interactions of multiple-noise sources.
2010-12-14 Chipmakers keep secrets at IEDM
Few papers provided clues on vendors' plans at the 2010 International Electron Device Meeting (IEDM). In place of clear presentations on plans for 22-/20nm plans, rumors abounded, with many believing the leading-edge foundries will extend bulk CMOS.
2006-06-16 Analog analysis tool works with flow
Gradient Design Automation Inc. recently launched CircuitFire, which is said to be the first 3D thermal analysis tool for analog and mixed-signal ICs that's integrated directly into the design flow
2012-07-31 Simulation reveals double battery life thru FinFETs-on-SOI
Gold Standard Simulations performed TCAD simulations where fully depleted FinFET style transistors made on SOI wafers allowed between half and one-third the leakage current of FinFETs made on bulk silicon.
2011-06-23 Upcoming technologies push power revolution
Several electronic technologies are playing high-profile roles in power revolution, among them 3D transistors, solid-state lighting, energy harvesting, superconducting cable and silicon carbide components
2013-04-10 Enabling superior FinFET predictability
Find out how 3D physical simulation tools can be used to provide superior FinFET predictability
2015-07-08 Trends, challenges for EUV lithography
Imec said cutting costs per transistor at the next-generation, the 10nm node, will be tricky, and even more challenging will be getting extreme ultraviolet lithography ready to enable a full 7nm node
2012-10-23 TCAD eases FinFET design and variability analysis
FinFET is the first fundamental change in transistor architecture since the time MOSFET replaced bipolar transistor as the transistor of choice for logic applications
2010-11-11 GPU brings geometric realism to PC gaming
Nvidia's GeForce GTX 580 GPU has been redesigned from the transistor-level up to give increased power efficiency and performance over previous generation products
2012-09-10 Fujitsu adopts HyperLynx for Serdes SI analysis
Fujitsu integrated its IBIS-AMI with the HyperLynx Channel Analysis technology and claimed to have achieved high-speed analysis while maintaining accuracy equivalent to transistor models
2014-03-20 28nm node at the final frontier of Moore's Law
Zvi Or-Bach of MonolithIC 3D emphasises the need to recognise that 28nm is actually the last node of Moore's Law and that dimensional scaling is no longer the path for cost scaling
2003-07-11 UMC explores tool for controlling sub-65nm gate leakage
Researchers at UMC are exploring selective epitaxial growth as a complementary approach to tackling problems of gate leakage in transistors at the sub-65nm node.
2012-07-04 The CMOS-mobile apps connection
The two biggest markets for logic chips are, of course, mobile (smartphone and tablet) and PC devices. These markets are now steering the technology direction and defining the winners and losers.
2015-10-20 Spotlight on the Apple A9 processor: Samsung vs. TSMC
Test revealed that while the chip from both foundries are supposed to perform identically, the manufacturing processes used by TSMC and Samsung are not the same.
2006-10-30 Samsung unveils 'first' 50nm DRAM chip
Samsung Electronics recently announced that it has developed what it touts as the industry's first 50nm DDR2 DRAM chip, which promises to increase production efficiency from the 60nm level by 55 percent.
2006-10-20 Samsung touts 'first' 50nm DRAM chip
Samsung Electronics announced that it has developed the industry's first 50nm DDR2 DRAM chip, touted to increase production efficiency from the 60nm level by 55 percent.
2005-09-14 Samsung to mass produce 16-Gbit NAND in 2006
Samsung Electronics Co. Ltd has developed the world's highest density NAND flash memory - a 16Gb device made using a 50nm manufacturing process technology - and that mass production is planned for the second half of 2006.
2005-10-20 Samsung announces 70nm-based 512Mb DDR2 SDRAM
Samsung Electronics announced that it has developed the first 512Mb DDR2 SDRAM using the 70nm process, which is said to be the smallest process technology yet applied to a DRAM device.
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