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2014-11-27 How to achieve 200-400GE network buffer speeds
Know how a serial chip-to-chip protocol, with 200-400 GE data rates and 4.5 B read/write transactions, can be used to eliminate throughput bottlenecks at the processor/external DDR memory interface.
2014-05-14 Serial interfaces beat a path to 56Gbit/s
The Optical Internetworking Forum will work on four flavours of 56G, including a spec covering half a meter of board traces and a connector, a chip-to-module project, and two short-reach proposals.
2012-09-19 MoSys touts second gen Bandwidth Engine IC
Delivering up to 384Gb/s throughput in a single device, the MSR620 incorporates cycle selectable burst functionality to support variable packet sizes with improved interface efficiency.
2015-01-15 Avago's 56Gbit/s PAM4 SerDes aims at routers, switches
Avago's latest SerDes utilises PAM4 with 56Gbit/s throughput. It can be used to design innovative ASIC SoC solutions and supports both copper and fibre optic interconnects.
2012-06-04 3D FPGA address Nx100G, 400G line card apps
Xilinx's heterogeneous all programmable Virtex-7 H580T 3D FPGA feature up to 16 28Gb/s and 72 13.1Gb/s transceivers.
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