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2015-05-20	UMC, ARM bare 55nm IP platform for IoT apps The 55nm ultra low-power IP platform, ARM Artisan, is the new physical IP offering from ARM and Taiwan-based UMC that enables low-power cost-sensitive designs for wearable devices.
2012-12-21	UMC touts 55nm display driver IC process The 55nm SDDI process claims to feature an ultra-small SRAM size and provides an ideal balance of power consumption, performance and chip size for integration into high-end Full-HD smartphones.
2007-03-29	TSMC to start 55nm prototyping service this May Taiwan Semiconductor Manufacturing Co. Ltd will start running its 55nm process technology on a prototype basis in May, initially planning to offer it on a bi-monthly basis.
2007-11-30	TSMC 55nm process tips knowledge-based processors TSMC and NetLogic Microsystems have collaborated on using 55nm process technology for fabricating low-power knowledge-based processors.
2009-10-21	SMIC pushes 40-/55nm devices Semiconductor Manufacturing International Corp. will extend its 45nm bulk CMOS technologies to 40nm and 55nm geometries.
2005-12-07	NEC says 55nm process cuts power consumption NEC Electronics announced that it has developed a 55nm node process named UX7LS that will employ emersion lithography and higher dielectric constant (high-k) material.
2006-09-14	NEC introduces 'first' 55nm CMOS-compatible eDRAM tech NEC Electronics and its subsidiaries announced the industry's first 55nm CMOS-compatible embedded DRAM technology.
2013-02-21	Globalfoundries bolsters 55nm CMOS logic process Globalfoundries enhanced their 55nm LPe 1V, a 55nm Low-Power Enhanced process technology platform, with qualified, next-generation memory and logic IP solutions from ARM.
2014-07-15	Cypress' 55nm SONOS embedded NVM process gets UMC nod SONOS does not alter standard device characteristics or models when added to baseline CMOS process, preserving existing design IP.
2014-03-10	55nm chip integrates GPS for wearables, IoT The GPS chip from RDA electronics includes a flexible hardware interface and programmability that can support sensor hub-type computation.
2014-09-02	SONOS returns, finds use in IoT Cypress Semiconductor sees that the 1960s-developed silicon oxide nitride oxide silicon technology has what it takes to address the scaling and power challenges in connected devices.
2006-06-26	NEC, NEC Electronics introduce high-k CMOS tech NEC Electronics and NEC introduced a CMOS technology for system LSIs using design rules for 55nm and below.
2007-01-25	NEC rolls CB-55L platform for cell-based ICs NEC Electronics announced that it has started offering its CB-55L platform for cell-based ICs developed on its UX7LS 55nm process technology.
2012-04-03	eMemory, HLMC join in high voltage fabrication The firms revealed that eMemory's One Time Programmable technology, NeoBit, has completed silicon IP verification in HLMC's 55nm high-voltage process.
2014-10-10	UMC to invest $6.2B in China foundry The foundry will be a joint venture with a total investment of $6.2 billion, aimed at ramping to produce 50,000 12-inch wafers a month using 55nm and 40nm process technologies.
2010-08-05	SMIC churns out 65nm wafers in Beijing Semiconductor Manufacturing International Corp. (SMIC) has moved its low-leakage 65nm process technology into volume production at its 300mm facility in Beijing, the company said. It is also working on the transition to 55nm technology.
2015-03-16	Embedded flash IP boosts power efficiency of IoT, wearables Faraday Technology and UMC announced a complete set of low power consumption fundamental IPs developed for UMC's 55nm Low Power (LP) embedded flash process.
2010-11-12	Car MCUs leverage Power Architecture Freescale's Qorivva microcontroller families will be built on 55nm NVM process for performance, safety and energy efficiency applications in smart vehicles.
2007-11-05	What's the future for NEC Electronics? A big question remains for NEC Electronics: Four years after being spun off from parent NEC Corp.—and several management changes later—is the chipmaker heading in the right direction or is it destined to sink?
2004-04-23	VLSI papers weigh 65nm, new circuits While technologists look to 65-nanometer nodes, circuit designers by and large are two generations back.
2013-06-25	Utilising non-volatile memory IP in SoC designs Integrating anti-fuse NVM on chip for program storage results to increased margin as well as independence from vagaries of supply chain and component availability.
2015-09-28	UMC starts mass prod'n of 0.11um eFlash touch ICs The process promises smaller and faster logic devices for higher performance, while enabling the integration of higher density embedded flash and SRAM for MCUs for various touchscreen devices.
2015-01-29	UMC raises capex to lead in 28nm node UMC has earmarked $1.8 billion for capex this year compared with the $1.4 billion it spent during 2014. During the fourth quarter of last year, it increased its sales revenue from 28nm chips.
2014-10-30	UMC grabs large piece of 28nm business United Microelectronics Corp. said that it has grabbed a larger piece of the 28nm business that is dominated by TSMC. UMC reiterated its capital expenditure for this year is at about $1.3 billion.
2009-10-13	UMC gears Singapore fab up for 45/40nm UMC's Fab 12i in Singapore has begun an aggressive expansion project, increasing its capacity and enabling 45/40nm production.
2015-09-21	TSMC heats up 10nm engine, preps 16nm for 2017 TSMC has gotten off to a slow start with its 16nm FinFET process and has also announced plans for specialty RRAM and MRAM memories that would act as alternatives to embedded flash.
2003-12-05	Toshiba, SanDisk to expand NAND flash memory production Toshiba Corp. and SanDisk Corp. have agreed to cooperate in the construction of a new 300mm wafer fab facility at Toshiba's Yokkaichi operations.
2005-02-23	Toshiba, SanDisk move up opening of 300mm flash fab Toshiba Corp. and SanDisk Corp. plan to open a new 300mm flash memory fab as early as June, several months ahead of scheduled.
2004-04-16	Toshiba, SanDisk expand 300mm NAND fab plan Toshiba Corp. said it expects the final capacity of its planned 300mm NAND memory fab to be about 37,500 wafers a month, 1.5 times larger than the original plan announced in last December.
2002-12-17	Toshiba's 300mm expansion to cost $3 billion Toshiba Corp. is targeting a much-anticipated plan for 300mm manufacturing: a $2.9 billion endeavor that includes two fabs, one for SoC LSIs and another for memories.