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90nm process technology
The 90nm process refers to the level of CMOS process technology that was achieved sometime 2003. Process technology basically boils down to the size of the finished transistor and other components.
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2003-02-03 Faraday rolls 90nm-processed test chips
Faraday Technology Corp. has taped out test chips manufactured on UMC 90nm process, using design solutions supplied by Magma Design Automation Inc., including Blast Fusion and Blast Noise.
2005-04-26 Elpida manufactures DDR2 SDRAMs using 90nm process
Chip maker Elpida Memory Inc. announced that it has begun manufacturing DDR2 SDRAMs using advanced 90nm process in its E300 Hiroshima plant this week.
2004-12-08 Elpida develops 90nm wafer process for DDR2 SDRAM
Elpida Memory Inc. has developed its new 90nm production process for high-performance DRAM products.
2003-01-03 EDA vendors brace for 90nm challenge in 2003
The ramp-up to 90nm chips will give the electronic design automation industry a strong focus in 2003, according to EDA industry executives and observers.
2005-05-27 EDA vendors announce flows for IBM-Chartered 90nm process
IBM and Chartered Semiconductor Mfg added common design support to their jointly developed 90nm process platform.
2002-05-21 Economics hold industry back from plunge into 90nm
Industry experts gazing at the 90nm process node don't like what they see.
2005-11-30 Dubai, CMP in 90nm CMOS 'transfer' deal
Dubai Silicon Oasis, an industrial park being set up in the middle-eastern Emirate of Dubai, has reached a supply agreement with Circuits-Multi-Projets to gain access to leading-edge process technology from STMicroelectronics.
2005-01-10 Demodulator uses 90nm tech to offer upgrades for STBs
ST announced the STB0899 DVB-S2 demodulator that supports both the latest DVB-S2 specification and the original DVB-S standard.
2004-01-09 Cypress adopts Cadence extractor for 130nm, 90nm flows
Cypress Semiconductor Corp. has adopted the latest version of Cadence Design Systems' Fire & Ice QXC as the sign off cell-based extractor in its 130nm and 90nm flows.
2006-04-04 Consumer market, 90nm driving foundry sales, says TSMC
The industry's insatiable appetite for consumer electronics and the trend toward 90 and 65nm process geometries spells good times for the foundry industry.
2004-05-31 Chipworks claims UMC-made 90nm part lacks low-k process
A Canadian semiconductor engineering services company claimed that the L90 manufacturing process from Taiwanese foundry United Microelectronics Corp. used in a Spartan-3 FPGA from Xilinx Inc. does not use a low-k interlayer dielectric, contrary to publicity material.
2002-08-30 Chip alliance rolls in 90nm CMOS platform
Motorola Inc., Royal Philips Electronics, and STMicroelectronics have jointly developed a 90nm CMOS design platform.
2004-06-16 Chasing Moore's Law with 90nm: More than just a process shrink
As chips clock faster and faster internally, the process technology becomes a limiting factor. To achieve even greater speeds, the distance between gates must be further reduced.
2006-09-08 Cadence, SMIC co-develop digital ref flow for 90nm tech
Cadence Design Systems and SMIC announced that they have jointly developed the low-power digital reference flow to support SMIC's advanced 90nm process technology.
2003-09-24 Cadence, Chartered partner on 90nm design solutions
The two companies have collaborated to provide a streamlined path from design to volume production for Chartered NanoAccess 90nm manufacturing technologies.
2003-01-15 Cadence to distribute TSMC 90nm libraries
Taiwan Semiconductor Mfg Co. Ltd has signed a distribution agreement with Cadence Design Systems Inc. through which Cadence will become a full-line supplier of TSMC's Nexsys 90nm libraries.
2003-01-16 Benefits, risks in 90nm SoC solutions
Depending upon proven capabilities with SoC designs, the cost/benefit of optimization options must be carefully weighed against assumptions on technology maturity.
2004-04-29 Bad signals interfere with 90nm designs
Bad signals interfere with 90nm designs.
2003-02-06 Avoidance proposed as solution to 90nm problems
Panelists discussing the challenges of 90nm design at the DesignCon 2003 conference produced an interesting consensus:
2006-06-22 ATI picks Mentor's tester for 90nm processors
Mentor Graphics announced that its TestKompress embedded deterministic test tool has been implemented by ATI Technologies.
2006-06-16 At 90nm, FPGA power loss shifts
The move to 90nm has challenged FPGA vendors to do more than just extract maximum density, features and clock cycles. This latest process node has introduced coincident issues on minimizing power consumption.
2007-01-10 ARM DDR1/2 memory interface supports TSMC 90nm process
ARM has announced the availability of the ARM Velocity DDR1/2 memory interface in its Artisan physical IP family to support TSMC's 90nm general-purpose process.
2004-01-14 Applied Materials systems aid UMCi move towards 90nm production
Applied Materials has received an order from Singapore's UMCi foundry for a multi-system suite of advanced transistor fabrication technologies for 300mm volume production.
2003-06-05 Applied Materials develops 90nm interconnect test chip
The X Initiative, a semiconductor supply-chain consortium, has announced that Applied Materials Inc. has produced a 90nm test chip for X Architecture interconnect designs.
2005-11-28 AnSem announces design of analog IP in 90nm TSMC tech
AnSem announced the successful design of its first analog IP in standard 90nm TSMC technology.
2004-04-22 AMD starts 90nm Opteron manufacturing in Germany
Advanced Micro Devices Inc. has begun using a 90nm-based silicon-on-insulator (SOI) manufacturing process at its Fab 30 in Dresden, Germany, according to Thomas Sunderman, a director of manufacturing technology within AMD's corporate manufacturing group.
2004-08-20 AMD confirms 90nm shipments, juggles processors
Advanced Micro Devices Inc. has confirmed reports that appeared last week that it has begun shipping for revenue microprocessor ICs made using 90nm manufacturing processes.
2006-04-06 AMD begins 90nm production at 300mm fab
AMD executives said that the company has earned its first revenues from microprocessors made on 90nm design rules at Fab 36, the company's first 300mm wafer fab.
2004-10-18 Altera hurdles 90nm challenges
There are three challenges to tackle when companies shrink the design process: interconnect, power management and design manufacturability.
2004-12-06 Agilent proves 6.25Gbps serdes core in 90nm process
Agilent Technologies Inc. has announced that it has validated its third-generation SerDes core in a 90nm CMOS process technology, making it possible for OEMs to embed as many SerDes channels (each operating at up to 6.25Gbps) as needed onto a single ASIC chip.
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