Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > ASIC FPGA design

ASIC FPGA design Search results

?
?
total search574 articles
2006-04-04 Indian design consolidation coming, say Indian semicon execs
With about 125 captive and non-captive IC, board, and embedded design companies in India at present, a wave of mergers and acquisitions is being predicted by Indian semiconductor executives
2007-04-19 ESL tool targets algorithm for FPGA, ASIC devices
Although Synplicity Inc. left the ASIC synthesis market last year, the company is targeting ASIC designers once again with a new edition of its Synplify DSP product
2005-04-01 Cobra strikes to reshape IC design flow
Magma Design rolls out its restructured Cobra technology that promises to reshape the nanometer-IC design flow process
2002-08-28 Xilinx overhauls FPGA software design package
A major upgrade of Xilinx Inc.'s Integrated Software Environment FPGA design tool package features new system-level design capabilities, improved performance, and new utilities to simplify FPGA design
2005-02-15 Users laud C design in DAC 'trip report
Engineers are warming to C language design tools, according to reviews in the Design Automation Conference (DAC) &quote;trip report&quote; released Friday (Feb. 11) by industry gadfly John Cooley
2006-07-01 Tool suite handles design complexity
Altera Corp. recently launched its Quartus 6.0 tool suite, which includes a timing analyzer that's said to pave the way for next-generation 65nm FPGAs.
2001-05-01 Timing analysis tools greatly impacts a successful design
Today, static timing analysis tools have matured to the point of handling significantly more complex design styles. This article examines the different kinds of timing analysis products used in ASIC, FPGA, and board-level design.
2004-03-18 Synopsys takes another stab at FPGA synthesis
Synopsys has tweaked its Design Compiler ASIC synthesis tool to enable designers to use the same tools and potentially the same design flow for ASICs and FPGAs
2005-08-16 Standard metal enables paradigm shift in ASIC technology
Deep-submicron design and manufacturing issues drive the critical need for a new design technology to replace standard cell
2015-06-11 Realising true FPGA-based verification
The scale of the latest FPGA technology is making that valuable emulator speed-up possible, but without the capital and operating expense associated with the big-box
2012-05-16 Quick fix for pesky FPGA design errors
Know the significance of hierarchical design and fast error resolution in achieving a working design with fewer design iterations
2010-03-15 Process tech simplifies ASIC migration
Tier Logic Inc. offers the first details about a technology that employs a novel processing change to build FPGA and ASIC products on a single die
2002-11-08 Potholes mark ASIC-to-FPGA conversion path
Designers should be aware of several "gotcha's" that can impede designs moving from ASICs to FPGAs, said Mike Dini of The Dini Group.
2013-04-26 Parallel FFT for multi-GHz FPGA signal processing
Learn about the design of a parallel FFT with runtime-configurable transform length, with emphasis on the throughput and utilisation numbers that are achievable when using parallel FFT
2006-05-31 New FPGA family from Xilinx offers 30 percent increased performance
Xilinx unveiled its latest family of FPGAs, which is said to be built upon the industry's most advanced 65nm triple-oxide technology, new ExpressFabric technology and ASMBL architecture.
2007-11-23 Mentor tips optimized FPGA design flow
Mentor Graphics has announced support for hardware description language (HDL) generated by MathWorks Simulink HDL Coder in the its Precision suite of advanced synthesis products.
2003-03-05 Mentor Graphics to develop FPGA verification solution for Thales
Mentor Graphics Corp. has entered into a technology relationship with Xilinx Inc. and Thales Communications to develop a new FPGA verification flow to meet Thales' requirements for its next-generation products
2005-03-16 Lower costs through design tool performance
The ISE software has capabilities that reduce design and verification times, attaining design closure faster
2005-09-08 Indian design group seeks funds for ramp
Mistral Software, an eight-year old firm based here and into embedded software and hardware development for the consumer electronics, telecoms, defense and automotive applications plans to make decisions on a merger, acquisition or infusion of venture funds by the year-end.
2008-06-16 Implement an FPGA ASIC prototype
Functional verification has become the single most critical phase of the ASIC development cycle and often the most time-consuming
2013-03-06 Impact of the Cloud on FPGA design
Know the benefits and potential pitfalls of cloud computing in FPGA design from a practical, day-to-day viewpoint
2003-06-02 Hybrid FPGA/ASIC devices address market needs
Hybrid FPGA/ASIC devices allow instant design changes like FPGAs, while leveraging the more efficient ASIC logic for fixed blocks of a design.
2014-10-16 How to improve FPGA comms interface clock jitters
Know how external phase locked loops can be used to resolve problems faced when dealing with clock jitter in FPGA-based high-speed communications interfaces such as SerDes
2009-01-13 HardCopy II ASIC fitting techniques
This application note describes some possible design considerations and solutions for fitting a Stratix II FPGA design into a HardCopy II ASIC.
2003-12-02 FPGA tool startup tackles ASIC prototyping
FPGA tool startup Hier Design Inc. has announced enhancements to its PlanAhead software that help make it more appropriate for ASIC prototyping.
2003-03-20 FPGA tool startup aims to make ASICs obsolete
An EDA startup staffed by seasoned industry vets said its FPGA design tools will make ASICs obsolete for most standard products
2007-04-16 Equivalence checker supports FPGA optimizations
Startup OneSpin Solutions GmbH has introduced a solution that makes FPGA equivalence checking practical by supporting those optimizations
2004-06-01 Embedded synthesis enhances high-density FPGA tools
Tools developed specifically for deep submicron programmable devices are emerging, enabling 100,000 gate and greater FPGAs to become mainstream choices.
2005-09-15 Do's and Don'ts of Architecting the Right FPGA Solution for DSP Design
Designing a flexible, programmable DSP system architecture is a daunting task.
2005-10-03 Design Trends and EDA Tools: China & Taiwan
IC and PCB design engineers in China and Taiwan reveal the current level of design and share development experience with EDA tools
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top