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2005-08-01 Spice simulation tool adds support for latest BSIM models
Tanner EDA released a new version of the company's T-Spice analog circuit simulation platform, including support for the latest Berkeley BSIM models up to version 4.4.0.
2006-09-18 Spice tools rev speed, accuracy
Berkeley Design Automation released in August two products that claim to speed Spice simulation by five- to tenfold while preserving full Spice accuracy
2003-05-16 Don't ignore underlying device physics
Today's models appear to have no physical basis - it is time to rethink gate modeling in order to maintain the accuracy of timing analysis.
2014-12-29 CMC expands Spice model standards for SOI
Additional models called BSIM-IMG and HiSIM-SOTB were developed for extremely thin-body SOI CMOS (ETSOI) and will enhance the popular BSIM and HiSIM standards platforms
2005-07-01 Analog EDA firm tackles PLL noise
Berkeley's PLL noise analyzer promises to shrink time-to-volume for discrete analog/RF chips and SoCs containing analog blocks
2005-05-11 TSMC expands DFM recommendations at 90nm
Taiwan Semiconductor Mfg Co. Ltd is expanding its design-for-manufacturing recommendations for engineers working with 90nm design rules, company managers told the TSMC 2005 Technology Symposium here last week.
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