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2009-07-08 TSMC, CEA-Leti team on maskless litho
TSMC signs up for CEA-Leti's IMAGINE program on maskless lithography for IC manufacturing.
2002-06-19 TRONIC'S Microsystems, CEA form MEMS R&D alliance
TRONIC'S Microsystems, a MEMS foundry in France, and the CEA Laboratory for Electronic and Information Technologies of the French Atomic Energy Commission, a major European R&D lab in the MEMS field, have signed a three-year R&D contract
2009-07-22 ST, CEA-LETI launch Nano2012 program
STMicroelectronics and CEA-LETI, the French Laboratory for Electronics & Information Technology have announced the formal launch of the Nano2012 Research and Development program at ST's site at Crolles.
2010-01-21 ST joins CEA-Leti e-beam litho program
The program covers tool assessment, patterning and process integration, data handling, prototyping and cost analysis.
2009-12-04 Soitec, CEA-Leti push 3D integration
The Soitec Group and CEA-Leti will offer comprehensive industrial solution beginning with process customization for prototype demonstration and will include licensing, both in 200mm and 300mm.
2009-04-15 IBM, CEA/Leti to cooperate on nanoelectronics research
CEA/Leti (the Electronics and Information Technology Laboratory of the CEA based in Grenoble) and IBM will collaborate on research in semiconductor and nanoelectronics technology.
2013-07-17 CEA-Leti, partners to enhance directivity of small antennas
CEA-Leti and three partners in the SOCRATE project aim to create wireless applications with improved spectral efficiency, reduced environmental electromagnetic impact and expanded functionality.
2011-02-08 CEA-Leti's anechoic chamber enables precise EMF measurement
The anechoic chamber allows telecoms researchers to simulate free-space propagation and avoid parasitic reflections, thereby achieving higher precision when measuring the electromagnetic spectrum below 1GHz.
2014-03-17 CEA-Leti reduces memory gate to 16nm via poly-Si spacer
Aside from the trimmed down gate length, the flash memory from CEA-Leti has over 6V expanded memory windows.
2015-06-30 CEA-Leti realigns research focus: FD-SOI takes centre stage
Leti, equipped with 200nm and 300nm wafer fabs, pioneered in its labs one of the key technologies in manufacturing SOI wafers, transferred it to Soitec, and worked with ST in chips based on FD-SOI
2015-01-09 CEA-Leti describes true 3D monolithic integration
According to the research institute, the CoolCube technology no longer relies on tall through silicon vias (TSVs) and coarse redistribution layers typically used for wafer-on-wafer die stacking.
2015-09-11 Upcoming IEEE conference to focus on key IoT tech
The emerging IoT market is looking for older nodes with lower development costs, broad range of process options, with many more players both at the foundry side and the design side.
2004-05-31 Tech coalition develops ultra-thin CMOS process technology
STMicroelectronics, CEA-Leti and Aixtron have developed an advanced process technology for the creation of ultra-thin transistor-gate-insulation layers for low-power applications at the 65nm and 45nm CMOS transistor technology nodes.
2014-12-05 Record solar cell efficiency achieved by French-German team
The solar cell, boasting 46 per cent efficiency, has been developed by Soitec and CEA-Leti, France, together with the Fraunhofer Institute for Solar Energy Systems ISE, Germany.
2002-04-17 Motorola joins Philips, STMicro, TSMC alliance
Motorola Inc. has joined Philips and STMicroelectronics, in conjunction with TSMC, in a five-year alliance to provide 90nm to 32nm chip technologies on 300mm wafers.
2015-09-30 MEMS devices come in 300mm-diameter wafers
CEA-Leti manufactured accelerometer MEMS devices on 300mm-diameter wafers using its piezo-resistive silicon nanowire technology.
2014-03-31 Light fidelity prototype transmits data at 10MB/s
CEA-Leti's wireless Li-Fi transmission prototype achieves the data rate at three metres using LED-based light power of less than 1,000 lumens.
2015-10-14 Laying down the scaling path for monolithic 3D
The IEEE S3S 2015 provided comprehensive coverage of R&D activities in the monolithic 3D space such as integrating a monolithic 3D device without changing the existing frontline fab process.
2004-08-12 Japan's TEL selected for European 'gate-stack' project
Chip equipment vendor Tokyo Electron Ltd (TEL) has signed an agreement with France's CEA LETI (Laboratory of Electronics and Information Technologies) to develop a CMOS gate stack that includes a high-k insulator and metal gate materials and deposition steps for 45nm and lower manufacturing process nodes.
2015-07-03 French company weaves RFID chips, antennas into yarn
Primo1D, a spinoff of the CEA-Leti, developed a microelectronic package that allows an RFID chip to be directly connected to a set of two conductive wires (that function as antennas) and woven into a yarn.
2015-06-12 FD-SOI development programme targets low-power apps
The collaborative design platform aims to give participants a comprehensive IC technology platform complete with IC design, advanced IP, emulator and test services along with industrial MPW shuttles.
2015-07-09 Dissecting FD-SOI: Understanding the risks and opportunities
According to the CEO of CEA-Leti, FD-SOI's genuine advantage wasn't obvious at process nodes such as 40nm or 32nm, but there is a certain degree of potential now at 28nm node.
2015-08-05 CoolCube 3D interconnect targets FinFET process
The research institute demonstrated the feasibility of CoolCube used to stack FinFET layers on its 300mm production line as well as with fully-depleted silicon-on-insulator manufacturing processes.
2004-07-15 Collaboration to develop ultra-thin gate-insulation layers
STMicro, CEA-Leti and AIXTRON developed an advanced process technology for the creation of ultra-thin transistor-gate-insulation layers for low-power apps.
2009-01-14 Trio works on e-beam solutions
Vistec Electron Beam Lithography Group, CEA/Leti and D2S Inc. have announced a collaboration focused on refining and validating advanced design-for-e-beam (DFEB) solutions for the 45nm and 32nm nodes.
2012-02-17 TEL joins DSA, maskless litho projects
Japan's Tokyo Electron Ltd (TEL) is working with on two collaborative lithography research projects spearheaded by the CEA-Leti research institute.
2013-04-22 Record operating range at 880m by single impulse radio chip
French fabless BeSpoon and the CEA-Leti research institute demonstrated an impulse radio ultra-wideband IC able to measure distances to within centimetres at a range of kilometres.
2007-07-24 Keithley, French lab enter nanotech testing pact
Keithley has agreed to jointly develop advanced nanotechnology and chip materials testing technology with France's CEA Leti Laboratory.
2004-08-19 European alliance grows for 45nm gate stack push
Collaborative research is cranking up in Europe, as France's CEA Laboratory of Electronics and Information Technologies (LETI) has gathered partners in a project to develop a 45nm-and-beyond CMOS gate stack with a high-k insulator and metal gate electrodes.
2004-02-23 Agilent teams up with French R&D organizations
Agilent Technologies Inc., the CEA-Leti (a laboratory of the French Atomic Energy Commission), and the INPG (Institut National Polytechnique Grenoble) have jointly developed an optical and high-speed communications test and design facility in Grenoble, France.
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