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What are CPLDs?
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. It is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections.
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2004-10-26 Xilinx unveils FPGA, CPLD solutions for automotive apps
Xilinx announced the immediate availability of its new line of FPGA and CPLD solutions designed to meet the requirements set by the automotive industry.
2002-11-14 Xilinx offers CPLD design kit for free
Xilinx Inc. is offering the CoolRunner-II Design Kit to qualified customers for free to further strengthen the emerging CPLD market.
2005-02-23 Xilinx grows CPLD market segment share
Xilinx Inc. confirmed it further gained CPLD segment market share during the company's December ending fiscal quarter.
2002-01-16 Xilinx axes analog to cool CPLD power consumption
Xilinx Inc. believes that CPLDs in their current form about to reach the end of the road, and says the only way to keep scaling them linearly is to get rid of power-hungry analog circuitry.
2000-06-29 XC9500 CPLD power sequencing
This application note describes the underlying XC9500 circuitry to give designers the understanding they need to best use these powerful CPLDs.
2000-09-06 Using the ATF1500/A CPLD
This application note describes the ATF1500/A architecture, power/speed management features and software support.
2008-07-24 Using a Xilinx CoolRunner-II CPLD as a data stream switch
This Xilinx application note shows how a Xilinx CoolRunner-II CPLD can be used as a simple logical switch that can quickly and reliably select between different MPEG video sources.
2000-06-28 Understanding XC9500XL CPLD power
This application note discusses the XC9500XL CPLD power estimation and optimization. The paper provides the reader with an understanding of sense amplifier-based CPLD power dissipation.
2010-03-16 Reducing power consumption with low-power CPLD designs
Any engineer involved with portable or handheld products knows that minimizing power consumption is a requirement for today's designs.
2004-05-14 Programming CPLD and FPGA code on the Intel PXA27x processor developer's kit
This app note describes how to program the CPLD code and FPGA code on the Intel PXA27x processor developer's kit main board, the Intel PXA27x processor developer's kit daughter card, and the Intel PXA27x processor developer's kit PMIC (LDO) card (PMIC card).
2003-12-20 PCI bus target controller implementation using a Lattice CPLD
This application note describes how to implement a PCI bus target controller using the company's CPLD products.
2005-07-22 New programmable device family combines CPLD, FPGA features
Lattice Semiconductor introduced MachXO, a new product family that combines the key features of complex programmable logic device (PLD) and FPGA technologies in a single device.
2006-10-13 Lattice launches automotive-grade CPLD line
Lattice Semiconductor announced that automotive versions of its ispMACH 4000Z CPLDs have been characterized and qualified to meet the certification requirements of the AEC-Q100 standard.
2010-09-23 Lattice goes green with CPLD packaging
Semiconductor manufacturer removes lead, halogens from packaging
2004-02-09 Lattice CPLD requires 13?A standby power
Lattice Semiconductor Corp. has released the final member of its ispMACH 4000Z family.
2005-04-08 Largest member of CPLD family
The EPM2210 device, the largest member of Altera's MAX II complex PLD family that features 2,210 logic elements, is now shipping in volume.
2013-02-08 ISI FPGA Configurator integrates CPLD, 512Mb Flash
Interconnect Systems Inc.'s FC512 FPGA Configurator comes in an 13x13mm BGA package and boasts an ability to configure large FPGAs within the 100ms PCIe limit.
2001-03-27 Implementing a reframe controller for the CY7B933 HOTLink receiver in a CY37032 CPLD
This application note describes the implementation of a reframe controller for Cypress Semiconductor's CY7B933 HOTLink receiver.
2004-03-15 EDA tools support new Altera CPLD family
Altera has announced that the new MAX II CPLD device family is supported by much of the EDA industry as well as by Altera's own Quartus II design software.
2000-03-17 Design of an MP3 portable player using a CoolRunner CPLD
This application note describes the design specs of the MP3 portable player using a CoolRunner CPLD.
2002-05-29 Datel 10A dc converters target DSP, ASIC, CPLD
The LSN D3 series of 10A dc/dc converters from Datel Inc. accepts inputs from 3V to 3.6V and delivers outputs of 1, 1.2, 1.5, 1.8, 2, and 2.5V.
2008-05-16 Cut down processor power consumption with CPLD
According to Mark Ng of Xilinx Inc., Reducing power consumption not only involves correct management of the operating mode of a device, but designing a system to take advantage of the modes a device can operate within. Offloading operations of the microprocessor allows it to stay in its low-power state for a longer amount of time. One way to reduce system power is to allow a low-power programmable logic device, such as a CPLD, to manage these offloaded operations.
1999-06-29 Customizable multi-channel HDLC controller with PCI interface in CPLD
This paper describes a CPLD-based approach that fulfills the higher performance requirements while offering a degree of customization unavailable with off-shelf products.
2008-09-05 CPLD timing
In this application note we will discuss how to constrain a CPLD design and how to verify that the design has met timing. Fundamentally, CPLD timing is the same as FPGA timing; however, the CPLD timing constraints are a subset of the FPGA timing constraints.
1999-12-22 CPLD schematic design guide
This CPLD Schematic Design Guide provides information on using the CPLD fitter and supported CAE interfaces to create designs for Xilinx CPLD devices.
2001-03-19 CPLD power consumption comparison
This application note presents a power consumption comparison among the 5V and 3.3V CPLDs that are being offered by Altera, Cypress, Lattice, Vantis and Xilinx.
2000-09-05 CPLD design hints for Atmel-Synario
This application note provides hints for new or experienced users on how to use Atmel-Synario to efficiently implement their designs into Atmel PLD and CPLD devices.
2007-06-14 CoolRunner-II CPLD starter kit suits low-power apps
Xilinx Inc. announces the immediate availability of its low-cost CoolRunner-II CPLD starter kit suitable for prototyping high volume, ultralow power applications such as handheld devices, smartphones, motor control interface, and embedded CPLD applications.
2001-04-12 Configuring Xilinx FPGAs using an XC9500 CPLD and parallel PROM
This application note describes a simple, low-cost design to configure any Xilinx FPGA in a serial configuration mode using a Xilinx XC9500 CPLD and any parallel PROM.
2000-06-23 Configuring Virtex FPGAs from Parallel EPROMs with a CPLD
This application note describes a simple interface design to configure a Virtex device from a parallel EPROM using the SelectMAP configuration mode.
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