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1999-01-01 Designing embedded memories using 4G compilers
Embedded memories gain over standalone memories in terms of power consumption, performance, flexibility of use, and test and diagnostics. Use fourth generation compilers to embed memories on a chip to realize the quality and reliability of standalone ones.
2005-10-03 Denali spreads new word in ESL mart
With a missionary zeal to establish standards and design methodologies, Denali Software leaps into the ESL market.
2005-10-12 Debugger improves FPGA power, speed and size tradeoffs
Impulse Accelerated Technologies has released its CoDeveloper Pro optimization and debugging software to complement its CoDeveloper C-to-FPGA compiler.
2003-04-16 DBIST answers advanced SoC test challenges
Due to the exponential growth in the time and cost to apply scan tests on sophisticated SoCs, Synopsys Inc. releases its DBIST as a key capability in its new product for advanced SoC testing, the DFT Compiler SoCBIST.
2004-01-16 Cypress releases IDE for PSoC mixed-signal array
Cypress MicroSystems has introduced the PSoC Designer 4.0 IDE for its PSOC mixed-signal array.
2003-02-11 CSI to take part of Synopsys interoperability program
Circuit Semantics Inc. has joined the Synopsys in-Sync program.
2003-07-30 Crossware enhances products with floating license technology
Crossware, a developer of embedded software tools, has integrated floating license technology across its complete range of commercial software, providing programmers with a more flexible solution.
2007-03-16 CPF-compliant tools aim for low power
Cadence Design Systems Inc. has added the Common Power Format to its existing logic design, verification and implementation tools.
2004-02-19 CoWare, ACE bring C compilers to embedded systems
EDA provider CoWare Inc. has partnered with ACE Associated Compiler Experts in a bid to shorten the time-to-market for customers developing embedded processors.
2013-07-23 Configurable processors as substitute for FPGAs
Here's an alternative to the traditional FPGA approach to creating a custom system.
2005-04-01 Cobra strikes to reshape IC design flow
Magma Design rolls out its restructured Cobra technology that promises to reshape the nanometer-IC design flow process.
2000-11-29 Classes and sections in C16x
This application note discusses the classes and sections in Keil's C16x C Compiler to enable control and placement of data objects.
2005-06-13 Celoxica ESL design suite upgrade expands speed, size limits
Celoxica's DK Design Suite introduces VHDL and Verilog optimizations that work with Design Compiler from Synopsys Inc
2003-08-20 CD-ROMs compile open-source EDA, IP
An updated CD-ROM package contains some 190 open-source EDA tools and 130 hardware designs - all for a price of $25.
2007-12-12 Cadence, ARM co-develop multicore ref design kits
Cadence Design Systems Inc. and ARM have jointly developed reference methodologies, one for the ARM11 MPCore multicore processor and the other for low-power implementation of the ARM1176JZF-S processor.
2012-11-28 Cadence synthesis tech eases Renesas ASIC design
The Encounter RTL Compiler claims to improve utilisation by 15 per cent, area reduction by 8.4 per cent, quick turnaround time and cost reduction for complex ASIC designs.
2004-02-20 Cadence rolls synthesis tool, new metric
Cadence Design Systems will announce that its Encounter RTL Compiler Ultra synthesis tool supports the VHDL language.
2003-04-11 Cadence makes another synthesis play, buys Get2Chip
Cadence Design Systems Inc. is once again trying to break Synopsys Inc.'s death grip on the ASIC synthesis marketshare, announcing that it has acquired Get2Chip Inc. for an undisclosed amount.
2005-07-22 Cadence Encounter RTL to perform Canon's future tapeouts
Cadence Design Systems Inc. announced that Japan-based Canon Inc. has adopted its Encounter RTL compiler for ASIC designs.
2005-10-07 Cadence announces design flow for ARM Cortex-A8 processor
Cadence Design Systems announced the immediate availability of a high-performance design flow for the new ARM Cortex-A8 processor.
2005-02-25 C/C++ to VHDL for $995
Orange Tree Technologies and SystemCrafter announce the SystemCrafter package for SystemC development work.
2004-01-14 C-based co-development environment rolls for FPGAs
Startup Impulse Accelerated Technologies Inc. has rolled out its CoDeveloper product, which offers a hardware/software co-development environment for FPGAs.
2004-02-06 C++ target testing for peripherals design
Testing software has always been a difficult activity. As systems grow more complex, the need for rigorous software testing has increased.
2004-04-22 C++ target testing for peripherals design
This paper considers the evolution of target testing over the last decade, evaluating the host/ target testing divide, and examining current trends.
2003-09-01 Building prototype user interfaces on a PC
Prototyping user interface will help you understand its requirements and usability issues early in the design cycle.
2005-10-03 Build efficient datapath designs
This article proposes RTL coding guidelines and a context-sensitive RTL datapath synthesis for improving design productivity
2001-05-01 Booting a TMS320C32 target system in a C environment
This application note describes methods to boot a TMS320C32 DSP target system in a C environment.
2005-02-01 Bluespec synthesizes SystemVerilog verification assertions
The startup has announced its ability to synthesize SystemVerilog verification assertions into Verilog 1995 RTL code.
2001-05-03 Bit-reversed addressing in C on the 'C3x
This application note contains a code example showing how to embed assembly language statements into the C code in order to perform bit-reversed addressing on TI's TMS320C3x DSP family.
2013-11-13 Basics of ARM design on mbed IDE (Part 2)
Read about a number of C/C++ programming methods for ARM designs using the open source mbed integrated development environment.
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