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2005-04-12 Renesas uses CoolTime for voltage drop analysis
Renesas Technology Corp. has adopted Sequence Design's CoolTime as its standard for dynamic voltage drop analysis on next-generation SoC designs.
2007-02-09 Macro modeling offers temporal, spatial modeling
Sequence Design's SMMART algorithm with temporal and spatial modeling addresses the issues of data size, prohibitive runtimes and memory footprint that are often the cause of failures in current transistor-based macro-modeling solutions.
2006-08-30 EDA tool finds uncovered electromigration issues
Sequence Design has combined its Columbus-AMS with components borrowed from CoolTime to create a new capability of diagnosing electromigration and voltage drop issues in full-custom designs.
2003-06-02 Tool analyzes power dynamically, at cell level
Apache launched its 2nd product designed for power analysis, the RedHawk-SDL.
2005-09-28 Sequence Design introduces 'formal' power grid verification
Looking to build on its reputation as an established provider of IC power management technology, Sequence Design rolled out a new product focused on another thermal issueIC power grid integrity.
2004-04-02 Sequence claims key optimization patents
Sequence Design has announced four new patents that cover key analysis and optimization technology, according to the company.
2006-03-07 Sequence addresses needs of SoC designs below 90nm
Sequence Design announced the next generation of its PowerTheater design suite to meet the demanding requirements for wireless, mobile and large SoC designs below 90nm.
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