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2004-10-26 Toshiba to use Rambus DDR2 interface
Toshiba Corp. has selected Rambus Inc. DDR interface cells for next-generation high-volume consumer applications
2004-07-22 Matsushita selects Rambus interface for TV chips
Matsushita Electric Ind. Co. Ltd, Japan, has signed an agreement with Rambus Inc. to integrate that company's DDR2 interface cell into its next-generation digital television (DTV) chipsets.
2007-06-01 Lower-voltage DDR2 DRAMs target data center apps
Micron Technology Inc. recently launched low-voltage DDR2 DRAMs that aim to lower server power consumption
2008-06-20 Implementing DDR2 PCB layout on the TMS320DM646x DSP
This application report from Texas Instruments contains implementation instructions for the DDR2 interface contained on the TMS320DM646x DSP device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.
2008-04-25 Implementing DDR2 PCB layout on the TMS320DM646x (Rev. A
This document contains implementation instructions for the DDR2 memory controller interface contained in the TMS320DM646x DSP devices. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.
2008-08-01 Get DDR2 PCB design right the first time
DDR2 is still relatively new in the industry. It is an evolutionary improvement over its predecessor, DDR, and is the next memory standard, as defined by Joint Electronic Device Engineering Council document JESD79-2E. It behooves layout designers to completely comprehend the interface before doing layout so that the boards they design will be created "right the first time."
2007-08-24 Free design tool implements DDR2-400 interface
Xilinx has announced support for a 400Mbps DDR2 SDRAM interface (DDR2-400) with its low-cost 90nm Spartan-3A and Spartan-3AN FPGAs.
2006-03-16 Xilinx releases Virtex-4 FPGA based DDR2 reference design
Xilinx announced the immediate availability of the Virtex-4 FPGA based 667Mbps DDR2 reference design delivering high bandwidth and reliable memory interface solution.
2007-08-09 Xilinx provides free reference design for DDR2-400
Xilinx unrolls a free reference design that enables designers to quickly implement 400Mbps DDR2 SDRAM interfaces with Spartan-3 FPGAs
2006-02-06 Xilinx announces new DDR2 reference design
Xilinx's DDR2-SDRAM interface uses the Virtex-4 ChipSync technology, a run-time calibration circuit that improves design margins and overall system reliability while reducing design cycles.
2004-07-23 Semtech controller meets DDR2 memory requirements
Semtech's SC1486A is a dual synchronous controller for systems designers specifying DDR2 memory
2004-05-12 Rambus offers interface IP for DDR, DDR2 DRAMs
Rambus for the first time is offering interface intellectual property for industry-standard double-data-rate, DDR2 and XDR DRAMs.
2012-08-28 PROFIBUS interface certified on Freescale Silicon
Freescale and TMG TE developed what they claim as the first PROFIBUS interface based on Freescale's Tower development environment addresses Layer 2 through 7 processing
2008-04-18 PMC modules interface I/O signals to Virtex-5 FPGAs
Acromag's PMC-VSX modules feature a DSP-optimized Xilinx Virtex-5 FPGA that is reconfigurable for high-performance I/O processing and user-developed algorithmic computation.
2009-12-30 PCI Express-to-DDR2 SDRAM reference design
This application note introduces the dedicated PCI Express logic block implemented in Arria II GX FPGA hardware.
2006-10-24 Low-profile DDR2 connector suits ATCA carrier boards
Tyco Electronics offers a low-profile DDR2 connector designed for the main memory requirements on Advanced Telecommunications Computer Architecture (ATCA) carrier boards
2009-06-16 LatticeSC/M DDR/DDR2 SDRAM memory interface user's guide
This user's guide discusses a memory interface for a Double-Data-Rate SDRAM (DDR/DDR2 SDRAM) implemented in the LatticeSC and LatticeSCM FPGAs.
2009-05-20 LatticeECP3 high-speed I/O interface
This application note describes how to use the capabilities of the LatticeECP3 devices to implement the high-speed generic DDR interface, and the DDR, DDR2 and DDR3 memory interfaces.
2007-03-16 Lattice offers 533Mbps DDR2 SDRAM controller IP
Lattice Semiconductor offers the highest possible data rate for a low-cost FPGA with the introduction of the industry's first 533Mbps DDR2 SDRAM controller IP core
2008-06-09 Implementing DDR2-400 memory interfaces in Spartan-3A FPGAs
High-performance consumer products and their requirement for low-cost, high-bandwidth memory create demand for high-performance DDR2 memory interfaces. Xilinx offers a Memory Interface Generator (MIG) integrated in the CORE Generator software for ultimate design flexibility and ease-of-use.
2009-04-13 High-performance DDR2 SDRAM interface in Virtex-5 devices
This application note describes a 667 Mb/s DDR2 SDRAM interface implemented in a Virtex-5 device.
2008-01-17 FPGA-based interface ref design rolls
The folks at Lattice Semiconductor have announced a LatticeECP2 and LatticeECP2M FPGA interface reference design supporting the TI ADS6000 ADCs
2010-10-08 FPGA modules add PCIe interface, high-speed memory
Acromag adds high-speed memory and data transfer to Xilinx FPGAs
2007-05-31 FPGA kits streamline DDR2 SDRAM devt
Xilinx Inc. rolls its low cost Spartan-3A FPGA development kit for DDR2 SDRAM interfaces, the Virtex-5 FPGA development platform (ML-561) for multiple high-performance memory interfaces (I/Fs) and the memory interface generator (MIG) software version 1.7.
2008-06-30 Elpida rolls 'first' 512Mbit DDR2 SDRAM with x32-bit I/O
Elpida Memory Inc. has developed what it claimed to be the first 512Mbit DDR2 SDRAM with x32-bit I/O configuration
2007-03-05 Dual DIMM DDR2 SDRAM memory interface design guidelines
As applications become more demanding, deeper memory is required leading to the need for more than one DIMM memory configuration. This application note focuses on the system implementation of a dual unbuffered DIMM DDR2 SDRAM memory interface, operating at 267MHz/533Mbps.
2010-01-12 DTV design platform eases interface integration
The integrated hardware and software platform lets multiple ASSPs be designed into one device tailored for DTV apps.
2007-03-05 Design guidelines for implementing DDR and DDR2 SDRAM interfaces in Stratix III devices
Although DDR2 SDRAM is currently the more popular SDRAM, designers looking to save system power and increase system performance should consider using DDR3 SDRAM
2005-09-29 Denali, LSI Logic ink agreement on memory interface IP
Denali Software Inc. and LSI Logic Corp. have entered into a strategic agreement on memory interface intellectual property (IP), the companies said
2006-10-16 DDR2 SDRAM interfaces for next-gen systems
Designing for DDR2 SDRAM interfaces involves many challenges, but emerging FPGA-based memory interface solutions are being developed to provide a robust solution that meets the industry's performance needs.
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