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| 2005-01-26 | New Stratix II member with 82 percent more LEs Altera announced that it has shipped the largest and final member of the Stratix II FPGA family. |
| 2005-06-17 | New DSP kit from Altera Altera announced a new DSP development kit that includes a DSP development board, Quartus II software v5.0, DSP system reference designs, and an evaluation version of The MathWorks' latest MATLAB/Simulink software update. |
| 2005-03-28 | GiDEL, Altera partner on rapid ASIC, SoC prototyping GiDEL unveiled its PROCStar II 180 development system that offers rapid ASIC and SoC prototyping, research and high-density apps. |
| 2005-07-01 | DSP kit leverages Stratix II FPGA Altera Corp. is selling a development kit that provides designers with a platform for producing FPGA-based DSP applications and ASIC and structured-ASIC design prototypes. |
| 2005-07-28 | Altera adds faster speed grade to Stratix II devices Altera disclosed that it is offering a new, faster speed grade for the largest two members of its Stratix II familythe EP2S130 and EP2S180 devices. |
| 2006-06-08 | XtremeData picks Altera FPGAs Altera Corp. announced that XtremeData Inc. chose Altera's Stratix II FPGA device for their XD1000 FPGA co-processing solution. |
| 2007-01-31 | Verification box exceeds 200MHz speeds Gidel Ltd's Proc_SoC verification box claims to exceed verification speeds of 200MHz, thanks to a direct FPGA-to-FPGA interconnect scheme. |
| 2006-06-19 | Programmable chips rev critical algorithms DRC and XtremeData deliver programmable coprocessors that can accelerate time-critical algorithms run on AMD64 processor. |
| 2005-01-25 | Altera bares industry's 'compelling structured ASIC solution' Developed as an alternative to the standard cell, Altera's HardCopy II is a non-reprogrammable device seamlessly migrated from a Stratix II FPGA prototype. |
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