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2012-10-19 ASML pumps up EUV initiative with Cymer purchase
ASML is looking to enhance is extreme ultraviolet lithography system by buying longtime supplier Cymer
2009-10-12 ASML details EUV lithograpohy roadmap
ASML showed a rough road map for extreme ultraviolet (EUV) lithography systems that could be ready for commercial use in late 2012.
2009-06-08 ASML details EUV litho production plan
ASML Holding NV has tipped the roadmap for the introduction of its first extreme ultraviolet (EUV) lithography machines at the IMEC Technology Forum.
2003-07-08 Asahi takes part in ISMT EUV lithography project
Asahi Glass Co. Ltd and Int. SEMATECH have agreed to partner on developing advanced mask technology and materials for use in EUV lithography.
2008-02-28 AMD, IBM detail first 'full field' EUV chip
AMD and IBM have produced a working test chip utilizing EUV lithography for the critical first layer of metal connections across the entire chip.
2010-01-25 450mm, EUV, TSVs suffer further delays
IC Insights sees more delays for two emerging and key IC manufacturing technologies: 450mm and extreme ultraviolet (EUV) lithography.
2009-04-28 First' 22nm SRAM cells from EUV litho debut
IMEC has presented what it claims is to be the first functional 22nm CMOS SRAM cells made using extreme UV (EUV) lithography. The SRAM cells are made with FinFETs and have both the contact and metal-1 layer printed using a full-field EUV alpha demo tool from ASML.
2002-03-19 TRW demonstrates advanced EUV light source
A TRW Inc. division said Thursday (March 14) that it and Sandia National Laboratories have conducted a lithography demonstration using a extreme ultraviolet light source
2007-10-26 Toshiba taps optical lithography in fabs
Despite the hype surrounding EUV, nanoimprint and other next-generation technologies, Toshiba is still using optical lithography in its current production fabs.
2010-06-02 Survey finds more in favor of193nm, EUV litho
A survey of more than 130 attendees hailed 193nm and EUV as the technologies that would be considered for manufacturing at the 32nm node or beyond
2012-10-03 Researchers from Cornell advance lithography with LSA tech
Laser-spike annealing has the potential to shorten processing time while also improving image quality of semiconductor lithography
2010-04-07 Quest for the right road to lithography
The industry has long known that without a viable NGL solutionwhich most assumed would be EUVMoore's Law scaling would slow and the secular growth rate of the IC industry would decline
2006-08-01 Lithography efforts trailing 32nm target
The chip industry is enjoying a short reprieve as immersion lithography continues Moore's Law of scaling for the next few years. But for chips with a 32nm half-pitch, lithographers are counting on either extreme ultraviolet or immersion 193nm scanners enhanced with high-index fluids
2002-07-10 JMAR announces breakthrough in lithography technology
JMAR Technologies Inc. is using "Collimated Plasma Lithography" to more accurately describe its breakthrough technology for processing higher performance silicon and GaAs chips
2014-07-21 Intel, Berkeley Lab develop super-resist for EUV
The innovative super-resist addresses the demands of advanced nodes of 10nm and below using extreme-ultra-violet light, which needs both sensitivity and mechanical stability.
2014-08-05 Industry analyst sceptical on IBM EUV results
IBM announced this week that the ASML NXE3300B scanner installed at its facility in Albany, N.Y., produced 637 wafers in 24 hours at a steady rate of 34 wafers/hour with a light source delivering 44W.
2016-01-25 Improvement in light source could speed up EUV progress
Prototype systems in commercial fabs now use an 85W light source, soon to be upgraded to 125W, while ASML recently demoed an 185W capability and promises it will hit 250W before the end of the year.
2010-11-15 IBM VP says EUV not ready
Gary Patton, VP, semiconductor R&D, IBM Corp., also emphasized the importance of computational lithography, noted the lack of development of high-k and 450mm chips, and discussed technologies to extend CMOS
2015-08-28 EUV reaches angstrom resolution
The angstrom-level resolution of a new type of microscope uses femtosecond pulses of extreme ultraviolet light (EUV), the same wavelength light to be used for sub-10nm semiconductor lithography.
2010-04-08 EUV metrology tool costs blow up
Sematech researcher Bryan Rice confessed that the industry still does not have the necessary inspection tools for EUVs, despite an R&D effort that has stretched over decades.
2012-10-09 Commercialisation of 14nm chips moved back due to EUV delays
In order to lay down patterns on next-gen chips that target sizes as small as 14nm, EUV systems need light sources that are nearly 20 times more powerful than the ones that are currently available
2013-02-21 ASML still believes EUV at 10nm ideal
ASML remains optimistic that incremental progress on EUV makes it the best option for manufacturing chips starting at 10nm node and below
2011-01-14 Nissan Chemical, Sematech join forces for EUV research
The company joined Sematech's Resist Materials and Development Center at University at Albany's College of Nanoscale Science and Engineering to cut line edge roughness and pattern collapse in images below 22nm.
2010-04-15 TSMC skips 22nm, leaps to 20nm half-node
Taiwan Semiconductor Manufacturing Co. Ltd announced plans to skip the 22nm "full node" after the 28nm node and move directly to the 20nm "half node."
2012-04-20 TSMC shifts from multiple to single-only process at 20nm
Shang-yi Chiang, EVP at TSMC, said the firm might also offer an 18nm or 16nm process node after 20nm if lithography technology is not available to make 14-nm devices cost effectively
2013-04-15 TSMC FinFET production set in 2013
Company executives detailed the new processes and how they aim to get there and also gave an update on 3D chip stacks and their on-going ramp of today's 28nm process node.
2009-03-03 TSMC details litho roadmap, taps maskless
Taiwan Semiconductor Manufacturing Co. Ltd has detailed it lithography roadmap and said it is still backing maskless technology at the SPIE Advanced Lithography conference
2012-02-17 TEL joins DSA, maskless litho projects
Japan's Tokyo Electron Ltd (TEL) is working with on two collaborative lithography research projects spearheaded by the CEA-Leti research institute
2010-03-02 SPIE Litho wraps with delays, double-patterning
The themes of this year's SPIE Advanced Lithography event were clear: D and Ddelays and double-patterning. Indeed, EUV is delayed. So is maskless. And nanoimprint is still stuck in R&D.
2008-03-31 Sematech forum to tackle transition to 22nm
The Sematech consortium is planning to host a three-day lithography forum May 12-14 because it is concerned about the growing uncertainty on the approach manufacturers and suppliers should take to transition from the 32nm to the 22nm half-pitch technology node
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