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2012-04-03 Developing NAND flash controller with high-level synthesis
Read about the application of a commercial HLS tool to a NAND flash controller with an error correction code block.
2008-02-11 Putting the system in electronic system design
The narrow scope of most ESL approaches and tools has limited their adoption. A more encompassing methodology, one that steps beyond the SoC, is needed to dramatically reduce time, cost and errors in complex system development
2016-01-08 Mixed-signal IC design: Forecasts for 2016
This article will examine the key trends, challenges, and emerging solutions in mixed-signal system design enablement, focusing on mixed-signal verification
2008-12-31 Low-power design binds chips, software
There's a nagging awareness that every new gadget consumes more energy, adding to the carbon footprintand these footprints seem to be getting larger. It's high time we made system design more power efficient
2005-05-02 It's time to move DFT to a higher level
Today, the 'D' in DFT does not really stand for design. All too often, at the gate level, it stands for do-it-late
2005-09-27 India gearing for outsourced ESL design
India's software skill base, growing hardware design skills and the increasing software content in electronics is making the country a likely source of Electronic System Level (ESL) design
2006-03-16 ESL design tools come up short
ESL and DFM tools need to pack far more capabilities than they do today if they are to represent the EDA industry's best opportunities for growth.
2010-12-24 Design methods shift to software, part 2
Designing via block level IP integration with virtual platforms shortens the number of steps between design intent and having working hardware and software
2005-01-21 CoWare, targeting system design, plans IPO
Tool vendor CoWare Inc. said it plans an initial public offering this year to raise funds for more R&D investments and to expand its global reach.
2012-05-23 Transformations of board design landscape beyond 10G
As systems demand interfaces capable of handling four-channel and 10-channel paths to 40/100G Ethernet, universal adoption of 10GBase-KR seems plausible.
2007-08-29 System, IC teardowns critical to 'business intelligence
Teardowns of ICs and systems have moved from being a hobby or a back-room skunks works activity to being a critical part of the electronics company's "business intelligence."
2009-05-25 Software tools speed up design process
EDA software vendor Cadence Design Systems has introduced two tools aiming at speeding up the design process
2010-11-30 Design methods shift to software
Changes in electronics design methodology seem to occur in ten-year stagesfrom the IDM's of the 1970s, ASICs in the 1980s, fabless companies in the 1990s, to the 2000s when application software took control
2006-01-25 Altium tool supports FPGA system development
Altium announced support for a range of discrete 32bit ARM technology-based processors in Altium Designer 6.0 design software
2014-12-22 Experimental methods for PCB design and manufacturing
EMS providers are being called upon to take on the task of design of experiments, also known as experimental designs, requiring them to work with OEMS to do the necessary research and development
2014-02-13 Energy design through unified hardware abstraction
Learn how to achieve energy-efficient solutions through optimal alignment across the pre- and post-silicon phases of energy optimisation supported by unified design flows, abstractions and formats
2004-09-03 Cadence emphasizes solutions in design tech symposium
As part of a promotional campaign of its portfolio in Southeast Asia, Cadence Design Systems showcased different versions of its electronics design software solutions in a design technology symposium held in Manila, Philippines, in Aug. 24
2014-10-17 Boost thermal management of electronic systems
Find out how accurate compact thermal models of three-die power packages can be used to improve the thermal management of electronic systems
2014-11-12 Determine acceptable jitter level in embedded design
Learn about the nuances of clock jitter specifications, and know how to determine the acceptable level of jitter early on in the development cycle to prevent dire impact on end product release schedules
2008-06-02 Understand, test OCP SystemC channel models
The OCP Protocol is a high-performance and bus-independent interface protocol between intellectual property cores that provides a standard for Electronic System Level design. It improves IP core reusability, making more predictable and productive SoC designs
2005-05-02 Addressing EDA's malaise
Today, when you hear the word EDA, what comes to mind? Failed companies. Flat revenues. Endless lawsuits. Marketing hype. Depressed market values.
2013-05-09 Why stitch and ship is no longer workable
As the systems change, the stitch and ship methodology is leading to increased numbers of costly failures
2015-11-23 What makes hardware emulation so compelling
Here is a quick assessment of the evolution of hardware emulators over the past two decades, comparing where things stood in the 90s to where they are today.
2003-09-03 Startup eyes hard/software pre-silicon validation
A 15-person design automation startup staffed with verification veterans aims to make pre-silicon validation tools practical for the masses
2002-03-11 SoC stumbling blocks cataloged at DATE
It's not enough to be fast, efficient and technically proficient. Designers now must become Renaissance engineers.
2004-03-09 Panel debates viability of ESL tools market
As IC designs become larger and more complex, there is a growing need for electronic system level (ESL) design tools
2005-05-05 Mentor Graphics extends Catapult C synthesis product
Mentor Graphics Corp. announced extensions to its Catapult C synthesis algorithmic synthesis tool, an electronic system level (ESL) design tool
2004-06-16 Mentor CEO confirms DFM as best bet for EDA boost
Finding sustainable growth in the EDA industry is not an easy thing, according to Wally Rhines, Mentor Graphics CEO and chairman of the EDA Consortium.
2006-10-16 ESL tool offers embedded software support in SystemC
Electronic system-level tools today aim primarily at hardware designers, but an upcoming SystemC architectural design tool expects to provide strong support for embedded-software development
2005-06-14 ESL may rescue EDA, analysts say
Electronic system level (ESL) design tools may return the EDA industry to double-digit growth, according to two Gartner Dataquest analysts
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