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2007-08-17 Xilinx teams with EDA giants on 65nm FPGA verification
Xilinx has announced a collaboration with three major EDA companies to address the challenges of 65nm ultrahigh-capacity FPGA design verification.
2010-09-23 FPGA design tool debugs TMR, ensures safety
GateRocket and Mentor Graphics have collaborated on a verification-through-synthesis flow solution for advanced FPGA design that targets developers of FPGAs for safety-critical applications in military and aerospace markets.
2007-09-24 Firms collaborate to address 65nm FPGA design verification
Xilinx Inc. and a group of EDA companies teamed up to define and implement new verification flows to address ultrahigh-density designs of 65nm FPGAs and new emerging FPGA architectures
2002-01-10 Aldec rolls out fast, fully automated FPGA design verification tool
Claimed to be the fastest, most fully automated FPGA design verification tool, Active-HDL 5.1 addresses the latest design trends in the EDA industry, the company says.
2007-02-05 Xilinx upgrades free ISE Webpack design suite
Xilinx has announced the immediate availability of the ISE WebPACK 9.1i release, the latest version of the company's free downloadable programmable logic design suite
2006-11-06 Xilinx unveils new design solution for Virtex-5 LXT
Xilinx announced the availability of a complete logic design solution including an update to its ISE design tools for their newest Virtex-5 LXT Platform FPGAs
2004-03-08 Xilinx rolls out latest FPGA design tool version
Xilinx has release the latest version of its real-time debug and verification software for FPGA design.
2002-08-28 Xilinx overhauls FPGA software design package
A major upgrade of Xilinx Inc.'s Integrated Software Environment FPGA design tool package features new system-level design capabilities, improved performance, and new utilities to simplify FPGA design
2005-05-09 Xilinx introduces new design tools for its DSPs
Xilinx introduced new design tools aimed at easing the implementation of high sample rate or multi-channel signal processing designs onto Xilinx DSP devices
2009-01-21 Verification tool provides step-by-step approach
OneSpin Solutions has amended its software and packaged it in a way that supports a step-by-step approach for beginners.
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges
2010-05-14 Verification platform suits algorithm design, LSI testing
Xilinx K.K. and Hitachi Information & Communication Engineering Ltd have released the LogicBench system-level design verification platform that uses Xilinx Virtex-6 LX760 FPGA.
2012-04-20 Verification platform geared for SoC, FPGA design
Mentor Graphics' Questa 10.1 release claims to increase productivity with regard to verification and boasts enhanced support of the Universal Verification Methodology
2009-06-22 Tool suite speeds up multiprocessor apps design
Multiprocessor design company 3L Ltd has introduced the latest version of its Diamond multiprocessor tool suite
2006-07-01 Tool suite handles design complexity
Altera Corp. recently launched its Quartus 6.0 tool suite, which includes a timing analyzer that's said to pave the way for next-generation 65nm FPGAs.
2005-01-27 Synplicity upgrades FPGA synthesis
Synplicity released a new version of its Synplify Pro FPGA synthesis tool boasting major run time and quality of results improvements
2004-03-18 Synopsys takes another stab at FPGA synthesis
Synopsys has tweaked its Design Compiler ASIC synthesis tool to enable designers to use the same tools and potentially the same design flow for ASICs and FPGAs
2015-06-11 Realising true FPGA-based verification
The scale of the latest FPGA technology is making that valuable emulator speed-up possible, but without the capital and operating expense associated with the big-box
2012-05-16 Quick fix for pesky FPGA design errors
Know the significance of hierarchical design and fast error resolution in achieving a working design with fewer design iterations
2007-10-05 Quartus II FPGA design software version 7.2 debuts
Altera has released its Quartus II FPGA design software suite version 7.2 that includes productivity and performance-focused enhancements that enable designers to achieve faster compile times and meet performance requirements
2005-04-04 Prover equivalence checker supports Actel design flows
Prover Technology Inc.'s eCheck equivalence checker has been validated for design verification in Actel Corp.'s Libero integrated design environment (IDE). Prover has also joined Actel's alliance program
2005-07-12 Open-source C++ project offer basics of verification system
After implementing a C/C++ library that provides a basic verification system at three companies where he worked, Mike Mintz decided that there had to be a better way
2005-06-16 Methodology for DSP-based FPGA design
Here's a technique to solve productivity and design-quality issues that have previously plagued DSP developers
2002-07-24 Mentor tailors verification tool for Xilinx FPGAs
Mentor Graphics Corp. and Xilinx Inc. are putting the finishing touches on verification platforms that integrate Mentor's Seamless HW/SW co-verification tool with processor support packages targeting Xilinx's Virtex-II Pro Platform FPGAs
2004-03-12 Mentor Graphics works on China's chip design industry
Mentor Graphics Corp. has signed a memorandum of understanding (MoU) with China's Ministry of Education (MOE) to help the country boost its IC design engineering talent pool and overall industry growth
2003-03-05 Mentor Graphics to develop FPGA verification solution for Thales
Mentor Graphics Corp. has entered into a technology relationship with Xilinx Inc. and Thales Communications to develop a new FPGA verification flow to meet Thales' requirements for its next-generation products
2003-05-22 Mentor design flow expands FPGA tools
Mentor Graphics Corp. has released an FPGA design flow that expands traditional FPGA tools with new technologies to address emerging challenges of complex FPGA designs
2013-01-23 Lattice upgrades FPGA design software
The company debuted the latest versions of Lattice Diamond and iCEcube2 design tools that claim to improve power calculations and design productivity
2013-10-08 Kozio unveils versatile hardware verification solution
Kozio has developed a special verification and test OS called VTOS that has a small memory footprint and boasts fast load times
2007-12-28 India design houses gear up for business surge
Top Indian chip designers are now tackling 45nm designs while adding new capabilities to extend their design services and prepare for an expected surge in business
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