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total search176 articles
2007-04-25 Device-native verification tool rolls for FPGAs
Startup GateRocket has rolled out a device-native FPGA verification solution that includes hardware and software
2002-08-27 Xilinx design tool integrates IBM bus analyzer
Xilinx Inc. will begin shipment next month of the ChipScore Pro v5.1i logic debug and verification tool that features IBM's CoreConnect integrated bus analyzer cores, core insertion tools, and an analyzer interface
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges
2011-06-08 Simulation tool offers Xilinx FPGA verification
MathWorks announced the availability of its EDA Simulator Link 3.3 with new FPGA-in-the-loop capabilities for Xilinx FPGA development boards to help engineers verify their designs at hardware speeds
2012-08-30 Overcoming challenges for SoC verification team
Know the unique problems that SoC verification engineers face and the approach that provides them a level of automation similar to that enjoyed by block-level verification teams
2002-07-24 Mentor tailors verification tool for Xilinx FPGAs
Mentor Graphics Corp. and Xilinx Inc. are putting the finishing touches on verification platforms that integrate Mentor's Seamless HW/SW co-verification tool with processor support packages targeting Xilinx's Virtex-II Pro Platform FPGAs
2003-03-05 Mentor Graphics to develop FPGA verification solution for Thales
Mentor Graphics Corp. has entered into a technology relationship with Xilinx Inc. and Thales Communications to develop a new FPGA verification flow to meet Thales' requirements for its next-generation products
2015-09-22 Examining the most underrated FPGA design tool ever
There is a design tool that is being quietly adopted by FPGA engineers because, in many cases, it produces results that are better than hand-coded counterparts
2009-10-05 Braving software-to-silicon verification challenges at 45nm
Software-to-silicon verification holds immense challenges at 45nm and beyond for system designers and tool vendors, with multiple paradigm shifts converging at the same time
2002-01-10 Aldec rolls out fast, fully automated FPGA design verification tool
Claimed to be the fastest, most fully automated FPGA design verification tool, Active-HDL 5.1 addresses the latest design trends in the EDA industry, the company says.
2002-05-03 Aldec releases verification software for Xilinx devices
Aldec Inc. has announced the release of the Active-HDL 5.1 XE design software designed specifically for use with high-density Xilinx FPGA devices
2007-08-17 Xilinx tool eases FPGA to PCB interface
PlanAhead 9.2 from Xilinx eases managing the interface between the designer's target FPGA and the PCB with the ability to import and export I/O port information through VHDL or Verilog headers
2004-03-08 Xilinx rolls out latest FPGA design tool version
Xilinx has release the latest version of its real-time debug and verification software for FPGA design
2002-08-28 Xilinx overhauls FPGA software design package
A major upgrade of Xilinx Inc.'s Integrated Software Environment FPGA design tool package features new system-level design capabilities, improved performance, and new utilities to simplify FPGA design
2009-01-21 Verification tool provides step-by-step approach
OneSpin Solutions has amended its software and packaged it in a way that supports a step-by-step approach for beginners.
2012-04-20 Verification platform geared for SoC, FPGA design
Mentor Graphics' Questa 10.1 release claims to increase productivity with regard to verification and boasts enhanced support of the Universal Verification Methodology
2003-06-05 TransEDA debuts property verification tool
TransEDA has announced a property and assertion capture and validation tool at the 2003 Design Automation Conference
2009-06-22 Tool suite speeds up multiprocessor apps design
Multiprocessor design company 3L Ltd has introduced the latest version of its Diamond multiprocessor tool suite
2006-07-01 Tool suite handles design complexity
Altera Corp. recently launched its Quartus 6.0 tool suite, which includes a timing analyzer that's said to pave the way for next-generation 65nm FPGAs
2004-03-16 Synthesis methods for ASIC, FPGA designs
Design methodologies that employ cross-implementation EDA technology such as the MultiPoint provide the flexibility to implement a design in the best possible medium.
2005-01-27 Synplicity upgrades FPGA synthesis
Synplicity released a new version of its Synplify Pro FPGA synthesis tool boasting major run time and quality of results improvements
2004-03-18 Synopsys takes another stab at FPGA synthesis
Synopsys has tweaked its Design Compiler ASIC synthesis tool to enable designers to use the same tools and potentially the same design flow for ASICs and FPGAs
2007-12-12 Standalone equivalence checker tailored for FPGA market
OneSpin Solutions says its 360 EC-FPGA equivalence checker is the industry's first sequential equivalence checking solution dedicated toand priced forthe FPGA market
2013-02-06 Solving SoC and FPGA prototyping debug issues
Read about the accelerated development, verification and debugging of ASIC hardware and software
2013-06-12 SilabTech uses Mentor Graphics' tool flow for 28nm PHY
SilabTech has achieved first silicon success for their latest 28nm high-speed, mixed-signal PHY IPs using Mentor Graphics' Pyxis, Eldo, and Calibre tools.
2014-11-11 Shifting to requirements-driven verification, test
Here is an evaluation of the pros, cons and potential obstacles to requirements-driven verification and test so you may decide if it is the next step in evolution
2004-03-29 Shanghai ICC picks out Aldec as EDA tool provider
Aldec Inc., provider of mixed-language simulation and advanced design tools for ASIC and FPGA devices, has been selected as the recommended verification solution source at the Shanghai IC Center (Shanghai ICC) in China
2012-05-16 Quick fix for pesky FPGA design errors
Know the significance of hierarchical design and fast error resolution in achieving a working design with fewer design iterations.
2007-10-05 Quartus II FPGA design software version 7.2 debuts
Altera has released its Quartus II FPGA design software suite version 7.2 that includes productivity and performance-focused enhancements that enable designers to achieve faster compile times and meet performance requirements
2014-04-14 Overcome challenges in FPGA-based prototyping
Here's a look at FPGA-based prototyping challenges and an innovative methodology unifying the benefits of gate-level partitioning and RTL partitioning, providing a short, automated, and predictable path to prototype
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