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2004-05-18 0-In tool verifies metastability effects
Claiming a "breakthrough" solution for the automatic verification of metastability effects, 0-In Design Automation is preparing Archer CDC-FX, an addition to its clock-domain crossing (CDC) verification tool.
2003-05-14 'Synthesis engines' roll out to speed up PLL designs
Barcelona Design has developed synthesis "engines" that are capable of generating PLLs for 0.15?m and 90nm CMOS processes.
2008-01-31 'First' pulse function arbitrary noise generator rolls
Agilent has introduced the industry's first pulse function arbitrary noise generator, which provides superior signal quality combined with versatile waveforms.
2006-12-14 'First' CE-grade 802.11n-draft-compliant chipset rolls
Metalink touts the industry's first CE-grade IEEE-802.11n-draft-compliant dual-band chipset for wireless home entertainment systems.
2005-03-30 'Failsafe' clocking mechanism offers clock switchover
Micrel's new clock multiplexer ICs feature runt-pulse elimination and Fail Safe Input circuitry.
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