Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > jupiterxt

jupiterxt Search results

?
?
total search14 articles
2002-05-28 Pixelworks selects Avant!'s JupiterXT, SinglePass-SoC
Fabless semiconductor company Pixelworks, has selected Avant!'s JupiterXT hierarchical design planning and the SinglePass-SoC design-closure solution to design its next-gen SoC products.
2004-05-31 Renesas adopts Synopsys planning flow for 90nm designs
Renesas Technology Corp. has adopted Synopsys Inc.'s JupiterXT design planning flow to improve turnaround time on chips for consumer electronics devices.
2007-11-09 Synopsys, UMC co-develop 65nm reference flow
Synopsys and UMC have co-developed a 65nm hierarchical, multivoltage RTL-to-GDSII reference design flow.
2004-12-03 Synopsys' Galaxy platform supports Sasken reference flow
Synopsys Inc. has announced that Sasken, an embedded telecommunications technology solution provider, has used its' Galaxy design platform to develop a reference flow to enhance the implementation and signoff process for its complex designs.
2005-02-09 Synopsys supports SUSE LINUX with verification platform
Synopsys Inc. will support the SUSE LINUX Enterprise Server 9 operating system (OS) from Novell on both 32bit and 64bit x86 instruction sets for Synopsys' Galaxy Design and Discovery verification platforms.
2006-06-29 Synopsys rolls out 2006.06 version of IC Compiler
Top tier EDA vendor Synopsys Inc. recently rolled out the last version of its next-generation place-and-route tool, IC Compiler.
2004-05-24 Synopsys releases design platform upgrade
Synopsys launched an upgrade to its design platform that delivers across-the-board improvements in run-time, capacity, QoR, silicon technology support and turn-around time.
2006-10-11 Synopsys announces new semicon design tech
Synopsys Inc. unveiled new MinChip technology that analyzes physical design complexity and identifies the smallest routable size for semiconductor designs.
2005-07-22 SMIC and Synopsys announce reference design flow 2.0
Synopsys Inc. and Semiconductor Manufacturing International Corp. (SMIC) said Tuesday (July 19) that they have developed a new RTL-to-GDSII reference flow based on Synopsys' Galaxy design platform and SMIC's 130nm process
2005-07-22 SMIC and Synopsys announce reference design flow 2.0
Synopsys and SMIC said they have developed a new RTL-to-GDSII reference flow based on Synopsys' Galaxy design platform and SMIC's 130nm process
2005-10-07 New design flow for ARM Cortex-A8 processor from Synopsys
Synopsys and ARM demonstrated the successful integration of Synopsys' Galaxy RTL synthesis, hierarchical design planning, physical implementation solution, sign-off and Discovery verification solution within a high-performance design flow for the new ARM Cortex-A8 processor.
2006-04-06 Hisilicon adopts Synopsys' Galaxy design platform
Synopsys announced that Hisilicon Technologies has adopted Synopsys' Galaxy Design Platform as its primary IC design flow for 130nm designs.
2005-11-07 DongbuAnam, Synopsys develop 130-nm reference flow
Korean wafer foundry DongbuAnam Semiconductor Inc. and EDA giant Synopsys Inc. have jointly developed a reference flow for DongbuAnam's 130nm process, the companies said Friday (Nov. 4).
2005-11-01 Die, package design get closer
Targeting designs headed for flip-chip packages, Synopsys' floor-planning and analysis tool enables concurrent die and package design flows.
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top