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2010-07-02 LSI, Seagate co-develop 65nm HDDs with LDPC
LSI Corp. and Seagate have enabled what they claim to be the first HDDs with low-density parity check (LDPC) read channel in 65nm process SoC technology.
2013-02-28 Low-power LDPC engine for multi-Gb/s wireless comm
Imec and Target extended their strategic collaboration on ASIP designs for multi-standard low-density parity check forward error correction ASIP architecture template.
2011-12-26 HDD read channel features new LDPC architecture
According to LSI, the RC5100 is the industry's first 28nm read channel and features a new low-density parity check (LDPC) iterative decoding architecture, which enables HDD manufacturers to achieve increased areal density, higher yield and lower power consumption for HDDs.
2015-12-23 Grasp soft-decoding in SSD controllers
In this article, we will take a look at what happens when that initial decode fails and how soft data can be used to recover data on the SSD.
2015-08-31 Exploring the future for SSDs
The migration from BCH codes to LDPC codes is going to enable a lot of great things inside SSDs, including better endurance and latency control.
2004-09-16 Conexant takes plunge for DVB-S2 wave
The company has announced CX24116, a chip that includes a demodulator and FEC unit, compliant with the DVB-S2 specification.
2010-07-08 Wi-Fi solution supports HD video streaming
Broadcom recently introduced a new member of the Intensi-fi product family, the BCM4331 802.11n solution designed to support HD home entertainment.
2004-05-10 STMicro to launch licensable DVB-S modulator
STMicroelectronics said it has begun offering a licensable modulator design based on the new DVB-S2 specification.
2014-08-21 Startup banks on triple-level cell NAND advantage
NxGnData hopes to grab the opportunities for technology that puts computational tasks closer to where data resides while also seeing a role for TLC NAND in the enterprise as "cold storage."
2013-11-22 SSD controller flaunts dual PCIe, SATA interface support
LSI launched its third generation SandForce flash controller line, a flash management technology for driving PCIe and SATA solid state drive (SSD) and flash card solutions.
2013-03-22 Readers' top product picks of 2012
The top ten most read product announcements of EE Times Asia's engineering community.
2008-04-01 Raise UWB throughput for wireless HD video
Here's a report on the promise and technical challenges facing UWB, and on the throughput and encryption considerations for HD video distribution.
2014-08-06 NVMe SSD controller packs fully Flash-optimised architecture
The 88SS1093 NVMe SSD controller integrates Marvell's third generation NANDEdge error-correcting, low-density parity check technology for higher reliability, and endurance boost.
2009-03-27 New standard sparks home net debate
A group of powerline technology supporters is proposing to create an overarching home networking standard.
2005-06-02 New floating-point and DVB-S2 cores strengthen DSP IP library
Xilinx updated its digital signal processing IP library for its Virtex-4 and Spartan-3E FPGA families to include a suite of floating-point operators and a DVB satellite FEC encoder core
2014-02-20 Millimetre wave modem IP supports 60GHz-80GHz
Using a common platform, the 1.6Gbit/s wave modem IP from Xilinx addresses low power small cell backhaul and high throughput wireless fronthaul applications.
2012-04-11 Maximizing 10GBase-T connectivity in data centers (Part 1)
Find out how to get the most out of 10GBase-T connectivity, which is touted as the most user friendly, flexible, economical, and backwards compatible option available.
2004-08-19 LPDC core provides superior BER performance
Comtech AHA released a Low Density Parity Check Code Forward Error Correction encoder/decoder core.
2006-06-29 Freescale ASICs power Hughes satellite broadband modems
Freescale Semiconductor will supply advanced satellite broadband ASIC solution to Hughes Network Systems, LLC.
2007-11-01 FPGA-based dev't platform eases migration to structured ASICs
An FPGA-based development platform that provides a seamless migration path to structured ASICs has been launched by TrellisWare Technologies.
2013-04-03 Designing a universal SDR platform
Read about an open software defined radio platform for the development of multi-standard wireless communication devices.
2015-08-07 Cheaper, denser NAND need better ECC
In this article, we expound why PMC-Sierra switched from Bose-Chaudhuri-Hocquenghem codes to low-density parity check codes for error correction in its solid-state drive controllers.
2013-04-08 Broadcom, SK unveil 5G Wi-Fi hotspot router
The 5G Wi-Fi claims to be three times faster than previous generations of Wi-Fi, and Broadcom's TurboQAM technology implements the highest data-rate 256-QAM mode in 2.4GHz for faster throughput.
2008-05-01 Broadcom debuts 65nm 10GbE PHY transceiver
Broadcom has rolled out a 65nm 10GbE PHY transceiver to support IEEE 802.3 10GBASE-T operation over 100m of Category 6A UTP or Category 7 cables.
2013-07-08 Addressing memory scaling concerns
Here are some promising research and design directions to overcome challenges posed by memory scaling.
2011-10-21 A review of 10GBase-T technology
Here's a discussion on the basic operations of a 10GBase-T transceiver and the inherent advantages of 10GBase-T technology as compared to alternatives, such as optical fiber and coaxial copper.
2006-04-03 A better path to video-over-WLAN
Higher throughput, excess bandwidth, MIMO, channel bonding and advanced forward error correction are but some of the remedies for issues confronting video delivery over WLAN.
2014-09-04 5G chipset touts 2x Wi-Fi performance
The BCM4358 delivers unparalleled throughput, Bluetooth co-existence performance, and indoor location accuracy, enabling OEMs to design smartphones and tablets with twice the Wi-Fi performance.
2006-12-14 'First' CE-grade 802.11n-draft-compliant chipset rolls
Metalink touts the industry's first CE-grade IEEE-802.11n-draft-compliant dual-band chipset for wireless home entertainment systems.
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