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2006-05-15 Synopsys, Si2 to form Liberty modeling standard board
Synopsys and the Silicon Integration Initiative plan to form a technical advisory board to facilitate the evolution of the Liberty library modeling standard.
2014-10-02 IEEE board approves OCV extensions to Liberty
The additions pushed forth by Synopsys give designers a modelling technique that may further cut timing margins for advanced process nodes such as FinFET, boosting timing closure turnaround-time.
2006-07-18 Group formed to advance Liberty modeling standard
A technical advisory board was formed to facilitate the development of the open-source Liberty library format.
2003-01-16 VMEbus CPU board touts speed, pricing
General Micro Systems' Pentium III-based VMEbus CPU board serves as a drop-in replacement for legacy 68040, 68060, and PowerPC VMEbus boards.
2002-11-20 Synopsys solutions support Artisan libraries
Artisan Components Inc. has integrated its libraries with signal integrity and noise analyses support using noise modeling capabilities in Synopsys Inc.'s Liberty open library standard.
2003-01-30 HP, Netegrity to co-develop interconnection module
Hewlett-Packard Japan (HP) and Netegrity Japan have agreed to jointly develop an interconnection module proposed by the Liberty Alliance Project.
2002-08-29 Prolific joins Synopsys in-Sync, TAP-in programs
Prolific Inc. has joined the Synopsys in-Sync and TAP-in programs to ensure interoperability of its ProLiquid software with Synopsys' PrimeTime and Library Compiler tools, and the Liberty modeling format.
2006-07-10 NEC inks mobile systems agreement with Spanish operator
NEC Corp. announced an agreement with Telefonica Moviles Espana S.A., a Spanish mobile operator, for delivery of its Liberty-enabled proxy.
2003-03-31 Virage supports Synopsys design platform
Virage Logic Corp. has announced that its silicon-proven product family is available for the Synopsys Inc.'s Galaxy Design Platform.
2015-05-11 Verilog-AMS vs SPICE view for DDR, LCD verification
In this instalment, we comparatively analyse the usage of both views from the perspective of DDR interfaces, LCD controllers and on-chip memories.
2003-01-08 TSMC, Synopsys partner to ensure library-flow compatibility
TSMC and Synopsys Inc. have collaborated to guarantee that TSMC's internally developed Nexsys 90nm libraries are fully compatible with Synopsys' RTL to GDSII flow.
2007-03-28 Tool taps clock gating for IC power optimization
Claiming breakthrough technology in IC power optimization, Calypto Design Systems is announcing PowerPro CG, a tool that automatically adds clock-gating logic to RTL code.
2005-06-02 Tool brings power analysis to virtual-prototyping phase
Bringing power analysis into the IC virtual-prototyping phase, Silicon Dimensions will announce the latest version of Chip2Nite, a design-planning tool aimed at logic designers
2002-10-04 TI India develops ASIC cell design methodology
Engineers at Texas Instruments India have developed a new specification method for driving cell design flow, overcoming the current lack of a set process for specification capture in ASIC cell design methodology.
2003-09-30 Synopsys, Artisan ink strategic partnership
Synopsys Inc. and Artisan Components Inc. have collaborated to provide technology support for Synopsys' Galaxy design platform tools for 130nm designs.
2006-06-29 Synopsys rolls out 2006.06 version of IC Compiler
Top tier EDA vendor Synopsys Inc. recently rolled out the last version of its next-generation place-and-route tool, IC Compiler.
2002-10-17 Synopsys expands open-source offerings
Synopsys Inc. has released an open-source version of a switching power exchange format at its semiannual EDA Interoperability Developer's Forum.
2005-06-21 Synopsys backs migration of analog design to OpenAccess
Synopsys Inc. has joined Si2 as a result of the company's increased presence in analog simulation.
2004-07-01 Startup automates library creation
Zenasis Technologies has developed a library design cockpit called ZenCell Factory that assists in creating standard-cell libraries.
2010-12-23 SoCs enable media servers
An emerging category of STBs, residential media servers will connect to IP clients in the home, which may be other STBs, networked DTVs, Blu-ray players, game consoles, and mobile devices.
2003-03-07 Silicon Metrics adds signal integrity tool
Silicon Metrics has added to its library development suite a new tool that performs signal integrity noise characterization.
2006-11-20 Sequence revs clock power with PowerTheater 65
Sequence Design has announced its flagship product for RTL power estimation and managementPowerTheater 65which includes enhanced clock power estimation and reduction as well as improvements to stimulus generation and performance.
2013-07-30 Reduce SoC power use without high-level EDA tools
Read about several situations where high level design tools are not useful and are sometimes a hindrance.
2001-06-16 Real system-level design challenge: Hardware-firmware integration
For today's engineering co-design, the real system challenge is the hardware/firmware integration.
2007-05-01 RadioScape picks Blackfin for mobile TV platform
DAB software developer RadioScape has chosen ADI's Blackfin processor as its mobile-TV platform and will share its extensive DAB knowledge with ADI to build mobile-TV receivers.
2014-04-29 Project Ara modular smartphones promote differentiation
Google's open-source modular smartphone concept could drive a shift from selling stand-alone products to simplified swappable modules performing the same functionalities that meet a user's end requirements.
2010-08-11 Polypropylene delivers glass-like creep resistance
The Thermylene P8 compounded polypropylene resin offers improved creep resistance at room temperature when compared to long glass filled PP.
2003-10-21 Panelists, keynoter cite EDA interoperability roadblocks
Panelists explored EDA interoperability "hot buttons" at the Synopsys EDA Interoperability Developer's Forum held last October 16-17.
2014-12-17 Open source platforms afford infinite design capabilities
The availability of open-source software and, more recently, hardware targeting embedded applications means that access to high-quality engineering resources has never been greater.
2006-10-16 One timing tool serves 65nm, 45nm designs
Cadence Design Systems introduced the Encounter Timing System, described as a "signoff-quality" timing product for nanometer SoC design.
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