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Macro Defect Inspection Search results

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2002-06-26 Nanometrics rolls out 300mm wafer inspection technology
Nanometrics Inc. has launched the NanoUDI technology for 300mm wafer processing, which meets requirements for yield management.
2011-01-24 LED analysis, wafer inspection tools launched
KLA-Tencor debuts Klarity LED, ICOS WI-2220
2006-07-20 System enables fully automated inspection of 300mm wafer surface
Vistec Semiconductor Systems announced that its new-generation LDS3300 enables fully automated inspection of the complete 300mm wafer surface
2002-10-16 Rudolph Tech establishes China office
Rudolph Technologies Inc. has established an office in Shanghai, China.
2013-09-05 Rudolph rolls NSX tool for IC, MEMS and LED packaging
The NSX 220 is an automated macro defect inspection system that uses grey-scale image analysis to provide accurate inspection and metrology in final manufacturing applications for wafers up to 300mm in size.
2008-08-06 KLA-Tencor to buy microelectronic biz of Vistec
KLA-Tencor has entered into an agreement to acquire the Microelectronic Inspection Equipment business unit of Vistec Semiconductor Systems
2004-12-29 August Tech adds patent to portfolio
August Technology Corp. has received a new U.S. patent number 6,826,298, for its on-the-fly inspection technology
2005-07-29 Leica system cuts ownership cost of semiconductor manufacturers
The new LDS3300 C from Leica Microsystems complements its LDS series by an innovative system, combining micro and macro defect detection at simultaneous use for all 300mm wafer apps
2005-01-25 August, Nanometrics to merge
August Technology Corp. and Nanometrics Inc. have entered into a merger agreement to create a combined company providing comprehensive inspection, measurement and analysis systems to the global semiconductor, flat panel display and related microelectronic industries
2013-07-26 Metrology system configured for advanced packaging
Rudolph Technologies' metrology suite includes specially-designed configurations for wafer level packaging, 2.5D (interposer) and 3D ICs using through-silicon via (TSV) as interconnects.
2016-03-31 Investigating the impact of etching time on 4H-SiC defects
In this article, we looked into the relationship between the pre-growth hydrogen etching time and defects density on 4H-SiC substrate surfaces.
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