Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > Monolithic 3D IC

Monolithic 3D IC Search results

?
?
total search28 articles
2015-07-27 Semicon West highlights path towards 3D IC
The recent event underlined the significance of the move towards more advanced 3D IC technology, as well as the impact of the 'More than Moore' leading to this progress
2015-04-21 Qualcomm to bring Monolithic 3D IC tech to smartphones
According to a Qualcomm executive, the company is looking to leverage Monolithic 3D IC technology to win market share in the $8 billion smartphone market.
2014-06-18 Qualcomm advocates monolithic 3D adoption
The chipmaker appears to be making a concentrated effort to employ 3D integration technology to stretch out the semiconductor roadmap beyond the scaling trajectory predicted by Moore's Law
2013-12-18 Monolithic 3D ICs gain momentum
A number of companies have, in one way or another, started to take leverage in the monolithic 3D IC space and designated the technology as an alternative to dimensional scaling.
2013-12-13 Latest developments in 3D IC technologies
Here's a look at the various forms of 3D IC technology, starting with the simpler incarnations and culminating in today's start-of-the-art implementations
2015-03-06 Intel recommends 2.5D, 3D integration for next-gen chips
Intel emphasised that heterogeneous integration enabled by 3D IC is essential to the development of future SoCs, especially in terms of scaling lithography processes
2013-12-30 Exploring monolithic 3D IC technologies
Learn about a relatively new approach that seems really promising: the Monolithic 3D IC technology.
2015-02-09 Dark Silicon: Looking to monolithic 3D for ray of light
According to an ARM executive, dark silicon is projected to account for "about one-third of total area in the 20nm technology node, increasing to as much as 80 per cent by the 5nm node."
2011-10-14 The move toward 3D chips
Semiconductor fabrication is moving toward 3D ICs and by next year, 3D chips will be available for commercialization
2014-08-19 Monolithic 3D accelerometer boasts WLP tech
The MXC400xXC three-axis accelerometer boasts a technology breakthrough in combining the 3D IC sensor with full WLP that translates directly to a 60 per cent cost and 50 per cent size reduction
2007-06-25 Designing in the age of 3D systems
The optimal utilization of the third dimension requires a careful design of the overall 3D system architecture
2015-01-09 CEA-Leti describes true 3D monolithic integration
According to the research institute, the CoolCube technology no longer relies on tall through silicon vias (TSVs) and coarse redistribution layers typically used for wafer-on-wafer die stacking.
2013-09-04 AMS spends $33 million for analogue 3D IC production facility
AMS investment aims to increase production capacity in response to a surge in demand outlook for ICs fabricated with 3D IC integration technology
2011-06-20 3D merges chip production routes
As advanced processes accompany the shrinking of devices per Moore's law, another section of the industry is running on more relaxed design rules with older fabs. Monolithic 3D could bridge this gap
2012-11-02 3D FEM EM simulation included in Microwave Office circuit design software
AWR's Analyst can be used in MMIC, RFIC and MIC on-chip passive components, RF PCB, module and packaging interconnect, finite dielectrics and hierarchical designs.
2013-05-15 CTO: TSMC prepared to push beyond IC limits
TSMC technology chief Jack Sun discusses the future of semiconductors-such as super-systems that move beyond SoCs-and the path the microchip foundry aims to take.
2013-07-11 Xilinx tapes out 20nm FPGA device
The firm worked with TSMC to infuse high-end FPGA requirements into the TSMC 20SoC development process to result in the first tape-out of the ASIC-class programmable architecture: UltraScale.
2015-07-15 E-band cost, reliability concerns in MMIC packaging
Traditional semiconductor packaging approaches either cost too much or suffer from signal integrity issues. However, new techniques are becoming available that can address these problems.
2007-06-08 Agilent boosts investment in RF/microwave design
Agilent Technologies Inc. announced the expansion of technologies in its Advanced Design System and GENESYS design platforms to provide a full spectrum of software tools for microwave and RF designers.
2014-10-29 Advances in power supply packaging
Here's a look at where the power industry is going in terms of component integration and thermal management. It also covers the developments in DC/DC power converter density.
2012-01-05 New 28nm platforms: Transforming Asia from world's factory to global R&D hub
The convergence of several long-term economic, market and technological trends are driving demand for a new class of devices that combine the capacity and customizability of ASICs, flexibility of FPGAs and cost effectiveness of ASSPs.
2016-02-16 Boost current control for better stepper motor motion
Implementing internal, bi-directional current sensing inside a stepper motor driver IC results in improved motion quality with lower system cost than legacy solutions
2011-08-11 Tri-gate rouses Intel-ARM rivalry
Intel's announcement of its low-power tri-gate transistor triggers anew its competition with ARM.
2014-05-08 POET integrates electronic, optical elements in one chip
The Planar Opto Electronic Technology (POET) platform is semiconductor fabrication process that uses gallium arsenide technology to combine electronic and optical elements on a single integrated circuit.
2014-09-05 If Moore's Law hangs back, revert to using old nodes
As the cost of scaling below 28nm multiplies, there has been a corresponding push to create new designs at established nodes using everything from near-threshold computing to back biasing and analogue sensors.
2014-04-22 FPGAs must shape up to accelerate growth
The rocketing ASIC mask-set and NRE costs have not yielded a surge of FPGA designs, but have rather driven engineers to resort to older technology nodes to mitigate the cost issues. Considering this and the standing Moore's Law concern, the FPGA outlook does not appear so bright.
2015-06-30 CEA-Leti realigns research focus: FD-SOI takes centre stage
Leti, equipped with 200nm and 300nm wafer fabs, pioneered in its labs one of the key technologies in manufacturing SOI wafers, transferred it to Soitec, and worked with ST in chips based on FD-SOI.
2007-04-02 Next-gen chips bridge design, process
Morris Chang of TSMC cites two strategies foundries need to develop to remain profitable in the CE era.
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top