Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > Monterey Design

Monterey Design Search results

?
?
total search41 articles
2004-10-14 Synopsys says it will shelve Monterey's tools
In confirming earlier reports of its acquisition of Monterey Design Systems, Synopsys Inc. said it will acquire most of Monterey's assets except customer contracts and will shelve all existing Monterey tools.
2003-09-16 SVP is key technology for nanometer IC design
Examine the importance of chip-level architectural issues and the need for physical hierarchy for multi-million gate nanometer SoC design
2003-04-25 Ricoh to deploy Monterey design flow in Japan
Ricoh Co. Ltd has purchased an entire line of Monterey Design Systems' planning, prototyping, and implementation tools for immediate use in Japan.
2002-09-04 Netlogic adopts Monterey digital prototyping flow
NetLogic Microsystems has purchased the entire suite of Monterey Design Systems' planning, prototyping, and physical implementation product line for their next-generation CFPs and NSEs.
2002-08-20 Monterey, Artisan to develop integrated design flow
Monterey Design Systems and Artisan Components Inc. have partnered to deliver an integrated solution that offers design tools and libraries certified on 0.135m, 0.155m, and 0.185m processes.
2003-11-07 Monterey upgrades IC implementation toolset
Claiming improved quality of results and faster run times, Monterey Design Automation has announced the shipment of v3.0 of its Dolphin physical implementation system.
2004-06-17 Monterey new technology reduces SoCs' die size
Monterey Design Systems announced a new design planning technology that automates the placement of hundreds of hard macros and reduces the die size of complex SoCs.
2003-11-21 Monterey Design selected for IC design flow by Mimos
Mimos Berhad formerly the Malaysian Institute of Microelectronic Systems has purchased the entire line of Monterey Design Systems products.
2003-07-25 Monterey Design receives patents on silicon prototyping, physical implementation
Monterey Design Systems has been issued two new U.S. patents entitled 'Method for Design Optimization Using Logical and Physical Information' and 'Method for Designing Large Standard-Cell Based ICs.'
2002-09-23 Monterey Design licenses Synplicity ASIC solution
Synplicity Inc. has granted Monterey Design Systems access to its Synplify ASIC synthesis software.
2002-02-12 Monterey Design lands $20 million in funding
Privately-held tool vendor Monterey Design Systems Inc. has received $20 million in equity funding, raising its venture funding total to $90 million.
2002-10-16 Monterey adds Synplicity synthesis to ASIC design
Claiming to have a full RTL-to-GDSII design flow, Monterey Design Systems has added logic synthesis to its Dolphin system.
2003-03-18 Monterey achieves progressive refinement patent
Monterey Design Systems has received a patent for some of the "progressive refinement" technology that underlies its IC physical design tool suite, bringing the company's total patent portfolio to 12.
2004-09-15 Cost pressures spotlight design reuse
The ultimate ultra-low-k material that complies with future microelectronics has not yet been found.
2003-06-23 Avnet adopts Monterey solution for latest SoC design
Avnet ASIC Israel Ltd has decided to utilize Monterey Design Systems' planning, prototyping, and implementation tool suite for its latest SoC designs.
2004-06-01 Startup offers new 'route' to IC design
Silicon Design Systems has revealed its plan to release its K-Route tool later this year
2005-10-11 Design, manufacturing worlds collide at Bacus
If there was a shred of doubt remaining about the magnitude at which IC design and manufacturing convergence is taking place, it was laid to rest last week (Oct. 3-7) at the 25th annual Bacus Photomask Technology symposium in Monterey, Calif.
2003-02-18 Uncertainty clouds EDA industry outlook for '03
The electronic design automation industry faces an uncertain 2003, when annual sales could shrink 2 percent or grow as much as 10 percent, according to CEOs assembled for the EDA Consortium's CEO forecast panel
2004-11-05 Synopsys buys assets of mixed signal IP vendor
Continuing its acquisition streak Synopsys Inc. announced Tuesday (Nov.2) that it has acquired certain assets of mixed-signal intellectual property company LEDA Design for an undisclosed amount
2006-01-02 Startup promises DFM-aware IC router
Startup Pyxis Technology Inc. has announced plans to field a design-for-manufacturability-aware IC router
2002-06-12 Standards inch forward with skeptics in tow
Two standards efforts will take major steps forward at the 39th Design Automation Conference, as the OpenAccess Coalition announces four additional EDA vendor members and much of the EDA community lines up behind Accellera's new SystemVerilog standard
2002-06-05 RTL-to-GDSII flow shows signs of maturity
The RTL-to-GDSII design flow will take center stage at next week's Design Automation Conference in New Orleans, as several vendors show new technologies intended to solidify an all-in-one flow
2003-02-07 Placement tools criticized for hampering IC designs
Current IC placement algorithms leave so much excess wire that chip designs are essentially several technology generations behind where they could be, according to a recent paper by researchers at UCLA.
2000-05-01 Long road ahead for analog synthesis
It may be a bit like asking why can't women be more like men, but the question, "Why can't analog be more like digital?" is the most common complaint among engineers attempting to use analog design tools. Synthesis (the automatic generation of physical circuitry from a high-level language description) is one area where analog design departs drastically from digital
2002-11-07 IC layout tools grow while front-ends decline in '01
IC implementation toolsets and IC layout tools experienced phenomenal growth in 2001, while front-end tools such as logic synthesis faltered, according to a new report by Gartner Dataquest.
2003-03-20 FPGA tool startup aims to make ASICs obsolete
An EDA startup staffed by seasoned industry vets said its FPGA design tools will make ASICs obsolete for most standard products
2003-01-03 EDA vendors brace for 90nm challenge in 2003
The ramp-up to 90nm chips will give the electronic design automation industry a strong focus in 2003, according to EDA industry executives and observers
2003-08-13 Designers gravitate toward RTL sign-off
Support appears to be growing for RTL sign-off, a radical concept that would see mainstream ASIC designers bypass the synthesis and IC layout steps.
2003-08-13 Cadence raising $350M for possible acquisition
Cadence Design Systems Inc. is selling off stock to buy back $100M of its own stock and for &quote;general corporate purposes,&quote; according to a statement released
2002-05-21 Cadence asks EDA vendors to build bridges between databases
Cadence Design Systems Inc. issued an open letter to electronic design automation companies, Thursday (May 16), asking them all to support the creation of an "interoperable infrastructure" between their databases
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top