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2002-10-16 Monterey adds Synplicity synthesis to ASIC design
Claiming to have a full RTL-to-GDSII design flow, Monterey Design Systems has added logic synthesis to its Dolphin system.
2003-09-16 SVP is key technology for nanometer IC design
Examine the importance of chip-level architectural issues and the need for physical hierarchy for multi-million gate nanometer SoC design
2002-08-20 Monterey, Artisan to develop integrated design flow
Monterey Design Systems and Artisan Components Inc. have partnered to deliver an integrated solution that offers design tools and libraries certified on 0.135m, 0.155m, and 0.185m processes
2003-11-07 Monterey upgrades IC implementation toolset
Claiming improved quality of results and faster run times, Monterey Design Automation has announced the shipment of v3.0 of its Dolphin physical implementation system.
2003-07-25 Monterey Design receives patents on silicon prototyping, physical implementation
Monterey Design Systems has been issued two new U.S. patents entitled 'Method for Design Optimization Using Logical and Physical Information' and 'Method for Designing Large Standard-Cell Based ICs
2002-02-12 Monterey Design lands $20 million in funding
Privately-held tool vendor Monterey Design Systems Inc. has received $20 million in equity funding, raising its venture funding total to $90 million
2003-06-23 Avnet adopts Monterey solution for latest SoC design
Avnet ASIC Israel Ltd has decided to utilize Monterey Design Systems' planning, prototyping, and implementation tool suite for its latest SoC designs
2005-10-11 Design, manufacturing worlds collide at Bacus
If there was a shred of doubt remaining about the magnitude at which IC design and manufacturing convergence is taking place, it was laid to rest last week (Oct. 3-7) at the 25th annual Bacus Photomask Technology symposium in Monterey, Calif
2003-02-18 Uncertainty clouds EDA industry outlook for '03
The electronic design automation industry faces an uncertain 2003, when annual sales could shrink 2 percent or grow as much as 10 percent, according to CEOs assembled for the EDA Consortium's CEO forecast panel
2003-01-10 Synplicity revamps ASIC synthesis tool
Synplicity Inc. is stepping up the competition against Synopsys, Get2Chip, and Incentia with its latest Synplify ASIC.
2002-06-12 Standards inch forward with skeptics in tow
Two standards efforts will take major steps forward at the 39th Design Automation Conference, as the OpenAccess Coalition announces four additional EDA vendor members and much of the EDA community lines up behind Accellera's new SystemVerilog standard
2002-06-05 RTL-to-GDSII flow shows signs of maturity
The RTL-to-GDSII design flow will take center stage at next week's Design Automation Conference in New Orleans, as several vendors show new technologies intended to solidify an all-in-one flow
2000-05-01 Long road ahead for analog synthesis
It may be a bit like asking why can't women be more like men, but the question, "Why can't analog be more like digital?" is the most common complaint among engineers attempting to use analog design tools. Synthesis (the automatic generation of physical circuitry from a high-level language description) is one area where analog design departs drastically from digital
2002-11-07 IC layout tools grow while front-ends decline in '01
IC implementation toolsets and IC layout tools experienced phenomenal growth in 2001, while front-end tools such as logic synthesis faltered, according to a new report by Gartner Dataquest.
2003-01-03 EDA vendors brace for 90nm challenge in 2003
The ramp-up to 90nm chips will give the electronic design automation industry a strong focus in 2003, according to EDA industry executives and observers
2003-08-13 Designers gravitate toward RTL sign-off
Support appears to be growing for RTL sign-off, a radical concept that would see mainstream ASIC designers bypass the synthesis and IC layout steps.
2004-04-29 Bad signals interfere with 90nm designs
Bad signals interfere with 90nm designs.
2003-07-01 Do-it-all tools: Good news and bad
Integrated solutions have some advantages in them; however, let us hope it doesn't usher in an era of being locked into single-vendor solutions.
2002-03-18 Cadence confirms acquisition of Plato
Countering threats to its bread-and-butter business in IC implementation tools, Cadence Design Systems confirmed Wednesday (March 13) that it has acquired IC routing start-up Plato Design Systems for an undisclosed amount
2002-11-26 Risks of customer-owned tooling send designers to ASICs
Like do-it-yourselfers who wished they had called the plumber or electrician instead of botching a home repair, chip makers seem to be having second thoughts about customer-owned tooling.
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