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2007-03-08 OCP-IP launches network-on-chip benchmarking initiative
The Open Core Protocol International Partnership is launching a network-on-chip benchmarking initiative. The first deliverable is a new white paper that outlines the essential features of an NoC benchmarking environment.
2014-12-09 Reduce power SoC consumption in the interconnect
Here's a modular approach to SoC interconnect for reducing power consumption. The modular concept is different because it consists of a distributed architecture of various components.
2008-07-24 Project Galaxy allots $6.4M for GALS research
The EU-funded Project Galaxy has started developing a design process for globally asynchronous, locally synchronous (GALS) architecture chips with novel network-on-chip (NoC) capabilities.
2006-03-16 NoC: Evolution toward the MPSoC era
Learn more about a low-cost on-chip interconnect that works to enable multiprocessor SoCs.
2006-01-16 NoC: A new venue for system innovation
The SoC concept has evolved through a number of design challenges over the years and so has the number of semiconductor IP blocks.
2010-08-03 Microprocessor delivers high-performance connectivity
The first member of ST's new advanced symmetrical multiprocessor SPEAr family delivers computing power and customizability for multiple embedded applications.
2015-02-20 Two sides of the coin: IP vs EDA
While there are many synergies between intellectual property (IP) and electronic design automation (EDA), fundamentally, these two are different businesses and technologies.
2012-01-26 Startup tries many-core revolution
Kalray's chip is expected to deliver about 200GOPS at 400MHz clock frequency and a maximum performance of about 500GOPS at power consumption of about 5W.
2014-11-18 Reducing SoC power: Where should the focus be?
Typically, efforts to manage power consumption in SoC design are focused on the CPU and GPU. The SoC interconnect is one area that needs to be re-evaluated.
2012-03-05 MIPI digital controller IP cuts mobile phone cost
Arteris FlexLLI offers point-to-point interconnect between two chips such as a mobile phone application processor and modem baseband processor, reducing compatibility risk.
2012-09-12 Kalray, TSMC ship many-core chip
Kalray's 28nm MPPA-256 chip, manufactured by TSMC, is now available for sampling while product qualification is expected to be completed by November 2012.
2012-10-30 KALRAY completes 256-core SoC using Mentor's sol'ns
The KALRAY MPPA-256 manycore processor is a 256-core SoC with 47MB memory using Mentor's functional verification, physical design and verification, and design-for-test flow product suites.
2015-11-17 ISSCC to see advancements in vision processors, 3D chips
Samsung is set to unveil its 10nm process technology and enhancements in its SRAM, DRAM and flash technologies while Mediatek will showcase a 10-core CPU, featuring three ARMv8a CPU clusters.
2006-08-17 Gartner: Chip IP market to rise 25% in 2006
Global revenue associated with semiconductor intellectual property is projected to reach $1.8 billion in 2006, a 24.9 percent increase from the previous year's revenue of $1.4 billion.
2005-07-18 Futuristic interconnects for ICs proposed
At the IITC, researchers presented futuristic technologies to solve the interconnect bottleneck in chip design.
2012-10-04 French company plans 1024 high-end DSP cores on single die
Kalray has recently sampled a Purpose Processor Array MPPA-256 processor integrates 256 processors onto a single silicon chip and is planning a 1024 processor version.
2014-05-30 Exploring the micropipeline
The micropipeline is a powerful yet simple design approach enabling the implementation of extremely efficient asynchronous circuits. Here's a review of its underlying concepts.
2011-05-09 Embedded MPU integrates two ARM Cortex-A9 cores
STMicroelectronics has launched a new embedded microprocessor family with advanced multimedia capabilities.
2007-10-25 EDA's big three unready for 3D chip packaging
Without design tools to allow exploration and tradeoffs to be made in 3D layouts, engineers are restricted to design in two dimensions and occasionally stack chips crudely. But without a clear market for 3D design EDA vendors are unlikely to offer tools.
2006-07-20 Design forum is heavy on ESL this year
The Design Automation Conference next week in San Francisco, California comes with a program heavy on ESL and embedded systems design, design-for-manufacturability, power-aware design and verification. See the details inside.
2015-01-09 Benefits of fault-tolerant SoCs for automotive market
Functional safety may be implemented faster and at a higher quality level through data protection and redundancy features incorporated across entire SoC designs.
2004-03-04 Arteris spins packet-based on-chip net IP
Arteris SA is commercializing a packet-based on-chip network as an alternative to the hierarchies of buses.
2009-12-15 ARM invasion moves past mobile market
ARM claims 15 new processor licenses, including four next-generation processors, for a broad range of markets including digital TV, MCUs, HDDs and networking applications.
2013-08-15 Allwinner licenses FlexNoC IP for mobile device applications
The Allwinner recently evaluated Arteris' FlexNoC interconnect IP and found it eliminated routing congestion and eased timing closure.
2013-07-08 Addressing memory scaling concerns
Here are some promising research and design directions to overcome challenges posed by memory scaling.
2010-11-11 3G/4G wireless base station SoC "doubles" performance
Texas Instruments creates new wireless base station SoC using KeyStone multicore architecture, programmable DSPs
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