Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > PCIe design

PCIe design Search results

?
?
total search436 articles
2007-04-18 Virtex-5-based devt kit speeds PCIe design time
The Xilinx Virtex-5 FPGA development kit accelerates time-to-market for designers developing 1-8 lane PCIe applications
2006-11-06 Lattice unrolls PCIe cores for its 90nm FPGAs
Lattice Semiconductor has added to its ispLeverCORE portfolio PCIe IP cores that are optimized for its 90nm LatticeECP2M and LatticeSCM FPGAs
2013-03-11 Design, verification IP aimed at Mobile PCIe
The Cadence M-PCIe IP and VIP solution enables the PCI Express architecture to operate over MIPI M-PHY, extending battery life of mobile devices such as thin laptops, tablets and smartphones
2006-06-21 Denali rolls out PCIe design IP product
Denali has announced the availability of its latest IP producta fully featured design core for PCIe technology.
2013-07-16 Adapting a PCIe design to specific app needs
With the appropriate mix of PCIe clock generators and buffers, embedded systems developers can address the unique requirements of various applications
2008-11-25 Xilinx's Virtex FPGAs conform to PCIe V2.0
Xilinx Inc.'s Virtex-5 FXT FPGA platform is now fully compliant with version 2.0 of the PCIe standard
2006-11-06 Xilinx unveils new design solution for Virtex-5 LXT
Xilinx announced the availability of a complete logic design solution including an update to its ISE design tools for their newest Virtex-5 LXT Platform FPGAs
2007-01-23 Wireless docking design enables 'wireless office
WiQuest said its wireless docking reference design solution, which combines high-quality video with replacement of the USB cable, makes the wireless office a reality
2010-06-17 Virtex-6, Spartan-6 ref design gets PCI-SIG-certified
Xilinx's Spartan-6 and Virtex-6 FPGA connectivity targeted reference design passed the PCI-SIG compliance and interoperability testing for PCIe 1.1 single-lane configuration.
2014-05-22 Two-lane PCIe SSD controller transfers data up to 1GB/s
The 88SS1083 controller from Marvell is designed with 28nm low-power process technology, and features SATA Express standard compliance.
2007-09-03 To bridge or not to bridge: When, why to go PCIe-native
It's never easy for designers to decide whether to use a PCIe bridge or develop PCIe-native solutions. They need to weigh factors such as time-to-market, development and manufacturing costs, performance, connectivity, and feature-set enhancements
2013-12-20 Timing devices from Micrel aimed at PCIe market
The PL6020xxx and PL6070xxx clock generators, and the SY7557xL clock distribution family promise extremely low phase noise for PCIe reference clock signals and industry leading output-to-output skew
2006-08-25 TI's PCIe x1 PHY supports source synchronous, DDR clocking
TI's new PCIe x1 PHY chip supports source synchronous clocking and DDR clocking, easing board layout design and enabling customers to choose low-cost FPGAs that don't run faster than 125MHz.
2006-06-12 Structured ASIC development kit with PCIe PHY
ChipX's development kit for the CX6100 structured ASICs integrates the same PCIe PHY used in ChipX's CX6100 structured ASIC family with a PCIe development board and FPGA
2008-08-15 Startup streamlines design path to 10GbE
NetXen Inc. will support multiple physical interfaces in its third-generation 10Gbit Ethernet controller, underlying the fragmented nature of cable support that has slowed the roll out of 10G technology.
2013-11-22 SSD controller flaunts dual PCIe, SATA interface support
LSI launched its third generation SandForce flash controller line, a flash management technology for driving PCIe and SATA solid state drive (SSD) and flash card solutions
2013-07-31 SpeedBridge adapter enables PCIe 3.0 design verification
The SpeedBridge Adapter for PCIe 3.0 provides easy bring-up and fast debug of PCIe-based designs when used with a Cadence Palladium Verification Computing Platform
2007-10-26 Solution tests PCIe, HDMI, DisplayPort compliance
Tektronix said its DPOJET software, used with its latest oscilloscopes, is the only solution with enough record length and sample rate on all channels to perform advanced measurements for PCIe, HDMI and DisplayPort compliance
2007-10-18 Solution eases PCIe 2.5/5GTps compliance testing
SyntheSys Research has released the BERTScope PCIe Test Bench, which the company says is the first complete solution for PCIe transmitter and receiver PHY compliance testing at 2.5- and 5GTps rates
2007-05-28 Signal integrity models roll for RF design tools
Samtec Inc. announces the launch of its interconnect signal integrity models for Agilent's advanced design system RF electronics design automation software
2007-05-30 SerDes core is PCIe 2.0-compatible
At last week's PCI-SIG Developers Conference in the U.S., NEC Electronics America has introduced a new SerDes core based on its advanced 90nm process technology.
2008-02-13 Ref design highlights extended mobility between Edge, WiMAX
The dual-mode reference design from NXP highlights the extended mobility between Edge and WiMAX by combining NXP's Nexperia Cellular System Solution 5210 for Edge networks with the forthcoming Intel WiMAX Connection 2400 solution for ultramobile and CE devices
2008-04-03 Ref design cuts cost of PC-based video surveillance
The high channel-density reference design from Conexant and Stretch enables cost-effective and scalable video capture on PCs
2008-04-01 Reduce EMI with proper SI design
This article provides a summary of the important design considerations and presents an LVDS case study for integrated signal integrity, power integrity, and EMI design
2007-09-06 Rambus, Cadence partner on verified PCIe solutions
Rambus and Cadence Design Systems have collaborated to develop fully integrated and independently verified PCIe solutions.
2008-08-11 Ralink claims first single-chip 802.11n 1x1 PCIe
Ralink Technology Corp. offers a complete line of single-chip USB and PCIe solutions, including the RT3090
2015-10-02 Protocol exerciser/analyser aimed at PCIe 4.0 design
Teledyne LeCroy said the Summit Z416 targets the needs of PCI Express developers by offering high performance 16GT/s traffic generation on devices with link widths up to 16 lanes.
2007-01-19 PMC/XMC module features ruggedized design
Pentek's Model 7141-703 is configured as a ruggedized PMC/XMC module fully compliant with the ANSI/VITA 20 conduction-cooling specification and ANSI/VITA 42 XMC specification.
2007-09-18 PLX unveils PCIe 2.0 switch portfolio
PLX Technology today is introducing a new line of PCIe switches that conform to the recently introduced PCIe 2.0 specification
2008-01-23 PLX ships samples of Gen 2 PCIe switch family
PLX Technology has announced it began to sample in December its Gen 2 PCIe switches to a broad base of key customers across North America, Asia and Europe
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top