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What are PLDs?
PLDs or programmable logic devices refer to a variety of logic chips that are programmable at the user's site. Programmability of logic means that new chip designs can be tested and easily changed without incurring the huge photomask costs for chips completed in a fab. In addition, memory-based PLDs can be reprogrammed over and over, which allows working products to be upgraded at the user's site.
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2002-07-17 Altera beefs up PLD software with ASIC flow, pushbutton utilities
Altera Corp. has upgraded its Quartus II PLD design software with new timing-closure capabilities and other features aimed at both novice and expert designers.
2001-08-09 Advanced W-CDMA channel card implementation with PLD
This conference technical paper discusses the functions and use of the W-CDMA channel card implementation with PLD.
2008-08-26 Actel steps up to battle PLD giants
Seeking to elbow its way into the spotlight and re-energize its bottom line, Actel Corp. recently acquired Pigeon Point Systems Inc.a move that propels the FPGA house into the TCA components sector.
2004-04-28 300mm wafers reach 'crossover,' says PLD makers
Xilinx Inc. and Altera Corp. said that the cost of producing their devices using 300mm wafers has fallen below that of 200mm wafers, an indication that Taiwanese foundries have hit their much sought after "crossover" production milestone.
2002-04-11 Xilinx unveils latest PLDs at IIC-China
Xilinx has unveiled its latest PLDs at the 7th annual International IC ? China Conference and Exhibition.
2006-11-06 Xilinx to invest $75 million in APAC
To accelerate programmable systems innovation and development within the Asia-Pacific technology market, Xilinx Inc. announced its Asia Pacific Technology Fund worth $75 million.
2005-11-18 Xilinx sets up authorized training provider network in Asia-Pacific
Xilinx Inc. announced the formation of its Authorized Training Provider (ATP) network in Asia-Pacific to provide electronics design engineers across the region with FPGA design courses.
2004-09-09 Xilinx re-organizes to emphasize embedded, DSP apps
Programmable logic device vendor Xilinx Inc. has created two divisions within its organizational structure; a DSP division under Omid Tahernia and an embedded processing division led by Mark Aaldering, the company said Sept. 6.
2002-10-30 Xilinx offers IQ solutions for programmable IC devices
Xilinx Inc.'s two new additions to its IQ Solutions line is specifically targeted for the automotive telematics market.
2005-11-03 Xilinx FPGAs enable advanced telematics platforms
Xilinx Inc. includes Spartan-3e family and Virtex-4 platform FPGA devices in the its XA product family of PLDs.
2004-06-09 Xilinx FPGA lead times easing, analyst says
The IC market could be cooling down, especially at Xilinx Inc.
2003-01-23 Xilinx establishes service network in Asia
Xilinx Inc. has extended its Global Services Division to the Asia-Pacific region.
2002-06-03 Xilinx challenges Altera's Stratix
Xilinx Inc. claims its Virtex-II Pro, an answer to Altera's new PLD architecture, integrates three devices along with immersing hard IP blocks.
2006-11-03 Xilinx CEO outlines strategy for China's electronic design
During a series of press briefings last week, Xilinx chairman, president and CEO Wim Roelandts underscored the commitment to accelerate the growth of electronic design innovation in China.
2002-01-16 Xilinx axes analog to cool CPLD power consumption
Xilinx Inc. believes that CPLDs in their current form about to reach the end of the road, and says the only way to keep scaling them linearly is to get rid of power-hungry analog circuitry.
2005-10-21 Xilinx and Nu Horizons expand distribution agreement to Asia
linx Inc. and Nu Horizons Electronics Corp. have expanded their North American distribution agreement to cover select countries in the Asia-Pacific. The expanded partnership provides Nu Horizon distribution rights for Xilinx's FPGAs, CPLDs, development software and intellectual property, and covers China, Taiwan, Southeast Asia and India.
2000-06-29 XC9500 CPLD power sequencing
This application note describes the underlying XC9500 circuitry to give designers the understanding they need to best use these powerful CPLDs.
2002-06-28 XC1700 and XC18V00 design migration considerations
This application note discusses the considerations for systems that support a migration path from the XC18V00 PROM to an XC1700 series PROM.
2002-06-28 Using the XC9500/XL/XV JTAG boundary scan interface
This application note describes the XC9500/XL/XV boundary scan interface and demonstrates the software available for programming XC9500/XL/XV CPLDs.
2001-03-23 Using the Ultra37000 ISR prototype board
This application note is intended to provide the designer with a set of instructions in using the Ultra37000 ISR prototype board, and highlights the board's features.
2000-09-05 Using the programmable polarity control
This application note shows the proper usage of the ABEL and CUPL syntax to configure the output polarity of Atmel PLDs.
2000-09-01 Using the ATV2500 and ATV2500B
This application note describes how to use the features of the ATV2500 and ATV2500B in the ABEL (and Atmel-ABEL) and CUPL (and Atmel-CUPL) high-level description languages.
2000-09-06 Using the ATF1500/A CPLD
This application note describes the ATF1500/A architecture, power/speed management features and software support.
2002-06-28 Using Serial Vector format files to program XC9500/XL/XV devices in-system
This application note describes how to program the XC9500/XL/XV devices in-system, using Serial Vector format (SVF) stimulus files.
2000-06-28 Using serial vector format files to program XC9500 devices in-system on automatic test equipment and third party tools
This application note describes how to program XC9500 devices in-system, using standard serial vector format (SVF) stimulus files.
2000-09-05 Using programmable logic devices
This application note discusses where, why and how to use PLDs, and also includes software and hardware support for Atmel PLDs.
2002-06-28 Using in-system programming in boundary scan systems
This application note discusses the basic design considerations for in-system programming of multiple XC9500 devices in a boundary scan chain, and shows how to design systems that contain multiple XC9500 devices, as well as IEEE 1149.1-compatible devices.
2001-03-23 Using IEEE 1149.1 boundary scan (JTAG) with Cypress Ultra37000 CPLDs
This application note provides an overview of the Boundary Scan Test (BST) implementation in the Ultra37000 CPLDs, and shows how to connect the devices in the JTAG chain for BST as well as ISR operations.
2001-03-22 Using FIFOs in Delta39K CPLDs
This application note provides instructions for all aspects of implementing synchronous FIFO buffers in Cypress Semiconductor's Delta39K CPLDs, such as description of FIFO operation, static timing analysis, etc.
2001-03-23 Using Cypress CPLDs in mixed-voltage systems
This application note explains how the FLASH370i and Ultra37000/37000V CPLDs can interface with different logic families in a mixed 3.3V and 5V environment.
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