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2014-12-22 Memory access ordering in complex embedded designs
The simple act of loading, storing, and transferring data between processor and memory is much more complex than it used to be. This article focuses on memory accesses, specifically the order in which they happen.
2008-06-02 AADL addresses system integration
With the increasing hardware diversity and complexity of embedded software systems, a model-driven development approach has become a viable method to address system-integration issues in the early stages of development. The architecture description language is suited for systems with challenging resource constraints and strict real-time requirements
2001-05-01 FPGA tools need hardware assistance
While techniques such as logic emulation provide a new tool for logic designers, many other FPGA-based systems serve as high-performance replacements for standard computers.
2004-03-25 MIT technology fuels startup's synthesis tool
EDA startup Bluespec Inc. this week will announce an exclusive license from the Massachusetts Institute of Technology (MIT) for synthesis technology based on term rewriting systems (TRS).
2015-07-20 HIL simulation for hybrid powertrain test
In this article, we explore how development of motor ECUs can be accelerated substantially through the application of hardware-in-the-loop methods.
2013-05-09 Why stitch and ship is no longer workable
As the systems change, the stitch and ship methodology is leading to increased numbers of costly failures.
2008-05-13 Virtualization: Creating a new software development infrastructure
Although developers readily look to software itself to drive innovation, few have considered their development infrastructure a possible vehicle for change. With the advent of virtualization in the development process, that's about to change.
2015-03-26 Understanding design compilation in hardware emulators
Design capacity in hardware emulators, also the compilation flow, is heavily dependent on the type of technology utilised in the verification engine.
2008-09-16 Single-chip multiprocessing steps up
SoC design options for software-friendly multiprocessing have been limited. Now, SoC design components, such as the MIPS32 1004K coherent processing system, mean on-chip symmetric multiprocessing (SMP) under a single OS is a real option.
2004-02-02 Scan-based testing can do job
Scan-based transition-fault testing techniques are increasingly used to test for delay-inducing defects.
2012-08-30 Overcoming challenges for SoC verification team
Know the unique problems that SoC verification engineers face and the approach that provides them a level of automation similar to that enjoyed by block-level verification teams.
2008-08-01 Multithreading comes undone
EDA vendors have struggled to meet the challenge of multicore IC design by rolling out multithreading capabilities for their tools. Nonetheless, the question cannot be ignored: Is multithreading the best way to exploit multicore systems effectively?
2013-08-15 Memory-oriented optimisation techniques (Part 2)
Part 2 discusses loop buffer, data transfer, and storage management.
2006-05-10 MCU combines SRAM, flash
STMicro's STR910F microcontroller family combines Ethernet connectivity, an ARM9E processor core, and embedded SRAM and flash memories.
2007-05-16 Lack of tools, expertise stalls multicore progress
The tools needed to program and debug multicore ICs are in the "dark ages," according to Anant Agarwal. Solutions are emerging, but the dearth of parallel-programming tools and lack of expertise among embedded designers threaten to slow the progress of multicore architectures.
2008-01-16 Keithley updates ACS test software
Keithley Instruments' updated Automated Characterization Suite V3.2 software enhances the powerful automation capabilities of ACS integrated test systems.
2014-03-20 Grasping parallelism and concurrency
Understand the distinction between these two, and see how those distinctions affect the embedded programmer's world.
2005-03-01 FPGA accelerates real-time app performance
Designers are eyeing new FPGAs with faster and better performance in DSPs and real-time applications. Rodger Hosking and Richard Kuenzler of Pentek say why.
2005-10-17 Coding an NPU to maximize throughput
To achieve high throughput rates, designers need to know the dos and don'ts in using network processing units for various parallel-processing techniques.
2014-07-01 Application architectures for image processing
Here's a discussion on the architectural choices that need to be made and the high level language tools approach to software-to-hardware compilation.
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