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2003-12-26 Xilinx, IBM assure of serdes interoperability
Xilinx Inc. has announced successful interoperability testing of the IBM High Speed serdes (HSS) core with Xilinx's Virtex-II Pro 3.125 serial transceivers.
2002-10-17 Wide Bus Applications Using Parallel BLVS SerDes Devices
This application note will show how to use the serializer and deserializer delay parameters to determine the timing constraints at the client receiver parallel interface when using serdes in parallel.
2008-06-30 Video Serdes IC chases away data control cables
Intersil Corp.'s ISL34340 Serdes interface transports 27 bits of video data and bi-directional I2C into a single high-speed LVDS cable of up to 10m long.
2002-03-20 Velio, Altera offer evaluation platform for serdes devices
The VC1022-DA-EVA evaluation platform for Velio's SONET-EOS product line for SONET/SDH networks allows interoperability testing of the SONET-EOS devices with Altera's APEX II PLDs.
2002-10-29 Velio serdes integrates four OC-48 transceivers
The company's VC1021S serdes integrates four OC-48 transceivers into a 27-by-27mm, 352-pin BGA and is designed specifically for SONET/SDH apps.
2002-04-23 Valuing serdes intellectual property
Companies designing chips with high-speed serial links face a classic choice: develop this IP in-house or license it from a third party.
2015-08-20 Using DRC for SERDES PCB layouts
In order to be sure that SERDES bus traces on a routed printed circuit board are error free, you may use an automated design rule checker, which makes such tasks easier.
2010-12-02 Understanding source-synchronous SerDes
Know how to efficiently use primitives in conjunction with the input delay blocks and phase detector circuitry.
2012-02-15 Understand preemphasis, equalization in GMSL SerDes devices
Find out how signals are degraded over cables and how to compensate for that degradation.
2003-03-11 TSDR0403G SERDES Macro V1 Error-Free Performance in a Backplane Environment at 3.125Gbps with PRBS 2^7-1 Data
This document describes measurements that were made on a TSDR0403G V1 test chip to illustrate the eye opening after driving a backplane path configuration.
2007-08-30 Transmitting I?S audio streams in automotive applications using the MAX9205/MAX9206 LVDS Serdes
This application note describes how to transmit I?S audio data streams between two audio components across a single, shielded twisted-pair (STP) wire using the MAX9205 10bit LVDS serializer and the MAX9206 10bit LVDS deserializer.
2004-03-22 TI serdes offers error-free transmission
The discrete serializer/deserializer (serdes) from TI is capable of error-free transmission over 80 inches of standard backplane trace in LAN, MAN, and WAN apps.
2002-04-17 TI serdes devices consume 25 percent less power
Texas Instruments Inc. has rolled out a new line of 10:1 and 1:10 serdes devices that transmits data over high-speed backplanes up to 660Mbps using 25 percent less power than competing devices.
2004-04-13 TI adds 6.25Gb serdes blocks to ASIC library
Texas Instruments' ASIC business unit has added 6.25Gbps serializer/deserializer interfaces to its 90nm process library.
2010-03-31 The move to a discrete Serdes solution for 4G
As network equipment manufacturers build up infrastructure for 4G, there will be an ever-increasing demand for high serial data rates between the radio equipment control and radio equipment in distributed base station architecture deployment.
2007-06-15 Single-chip Serdes rolls for 2.5Gbps GPON apps
Micrel's SY87725L programmable Serdes supports gigabit passive optical network with data rates up to 2.5Gbps on the receive side and 1.25Gbps on the transmit side.
2002-08-09 Silicon Image serdes reduces power consumption
Silicon Image Inc.'s SiI 2024 2Gbps quad-port serdes dissipates 250mW per port - half the power consumed by the company's current SiI 2020A device.
2005-05-16 Signals predict Serdes jitter behavior
By measuring and characterizing a series of jitter response curves, it is possible to anticipate jitter frequency sensitivity
2007-07-03 Signal integrity toolkit checks jitter, boasts new Serdes lib
Agilent has pulled the wraps off a new toolkit that identifies and analyzes sources of jitter in multi-gigabit communication link designs.
2008-07-14 Serdes with UART/I?C control suits automotive cameras
Maxim Integrated Products introduces the latest members of its high-speed LVDS Serdes family: the MAX9257/MAX9258 Serdes chipset.
2006-07-20 SerDes transmits data at up to 2.7Gbps
The latest member of Texas Instruments' WizardLink family of multi-gigabit transceivers is a 1.6-2.7Gbps rad-hard SerDes that is designed to support serial interface in high-speed data bus apps for aerospace equipment.
2014-09-10 SerDes tech uses NRZ signalling to reach up to 57.5Gb/s
Credo aims to make the SerDes available as both IP and fully manufactured ASIC devices that can be used on line cards, in optical modules, in active copper cables, and next-gen compute ASICs.
2007-05-01 Serdes targets multimegapixel image sensors
Fairchild Semiconductor introduced a ?Serdes device designed for serializing high-speed signals in multimegapixel-resolution CMOS and CCD image sensors, commonly found in portable products including cellphones with built-in cameras.
2014-09-18 SerDes platform speeds deployment of 100G network chips
The SerDes evaluation platform from Open-Silicon integrates a 28Gb/s SerDes quad macro, using PHY IP from Semtech, and meets the compliance needs of the CEI-28G-VSR, CEI-25-LR and CEI-28G-SR specifications.
2006-03-01 Serdes packaged in 5-by-5mm QFN
Texas Instruments has started to package its low-voltage differential signaling serializer/deserializer (Serdes) devices in a space-saving 5-by-5-mm QFN.
2010-06-15 Serdes offers bidirectional control channel
From National Semiconductor Corp. comes the Channel Link III serializer and deserializer (Serdes) family that feature integrated zero-latency, bidirectional control channel.
2013-07-04 SerDes module delivers uncompressed HD digital video, audio
TI's latest chipsets supports high-bandwidth digital content protection, and a direct connection to LVDS input sources and displays, including the OpenLDI standard.
2009-10-02 Serdes handles high-resolution, 24bit FPDs
National Semiconductor rolls what it claims are the industry's first Serdes chipsets for high-resolution FPDs.
2010-12-09 SERDES Framer Interface Level 5 for FPGA
Read about the implementation of SERDES Framer Interface Level 5 (SFI-5) in a Virtex-6 XC6VLX240T FPGA.
2005-07-20 SERDES cuts system cost
The new 14-bit low-voltage differential signaling (LVDS) serializer/deserializer from Texas Instruments promises to save system cost and board space in consumer electronics products
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