Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > SerDes

SerDes Search results

total search515 articles
2006-03-16 Loop-timed SerDes offers low-power, high-speed
Analog Devices Inc. has developed a loop-timed serializer-deserializer (SerDes) device for passive optical networking terminals.
2003-05-02 LeCroy to use Lattice serdes platform
LeCroy has selected Lattice Semiconductor's Briefcase Evaluation Platform to be used on its SDA family of serial data analyzers.
2009-06-17 LatticeSC Serdes jitter
This application note addresses several topics related to Serdes jitter. It describes some basic jitter definitions and concepts needed to understand the roll of the Serdes elements in data link performance.
2009-05-12 LatticeECP3 Serdes/PCS usage guide
The LatticeECP3 FPGA family combines FPGA fabric, I/Os and up to 16 channels of embedded Serdes with associated Physical Coding Sublayer (PCS) logic. The PCS logic can be configured to support numerous industry-standard, high-speed serial data transfer protocols.
2003-06-30 Lattice serdes transceiver suits SONET, 10GbE apps
Lattice Semiconductor Corp. has released what it claims is the industry's lowest power SERDES transceiver that is based on the 0.13?m CMOS technology.
2002-10-24 Lattice FPGA integrates 3.7Gbps serdes transceiver
Lattice Semiconductor Corp. has rolled out two FPGAs and one switching device that integrate a serdes transceiver.
2003-01-22 Infineon networking IC serves as serdes, converter
The company has announced the availability of the Titan 768MD optical networking chip that can perform both interface conversion and serdes ops.
2005-10-03 HyperLynx update supports Serdes design
New capabilities of this signal-integrity product will help ease PCB design using Serdes interconnects.
2001-07-03 Gigahertz Signaling Technologies: RSL, QRSL And Quad SerDes
This paper reviews the characteristics of three viable signaling solutions: RSL (Rambus Signaling Level), QRSL (Quad Rambus Signaling Level) and Quad SerDes - all of which are capable of transferring information at over a gigabit per second.
2007-11-16 Gigabit Serdes: A key piece of the PON puzzle
New Serdes designs that support critical PON requirements such as fast re-lock will be one of the keys to PON infrastructure build out.
2002-08-06 Gennum, UMC codevelop single chip serdes
Gennum Corp. and United Microelectronics Corp. (UMC) announced that they have achieved first pass silicon success for the GS1532 serializer and GS1560 deserializer.
2012-09-10 Fujitsu adopts HyperLynx for Serdes SI analysis
Fujitsu integrated its IBIS-AMI with the HyperLynx Channel Analysis technology and claimed to have achieved high-speed analysis while maintaining accuracy equivalent to transistor models.
2006-09-25 FPGAs include SerDes, PCS block
The new ECP2M FPGA family from Lattice Semiconductor consists of low-cost devices that offer high-speed embedded SerDes I/O plus a pre-engineered physical coding sublayer block.
2011-11-01 FPD-Link III SerDes with bidirectional control channel for I2C
Here's an application note that tackles the communication between devices using the FPD-Link III SerDes with a bidirectional control channel using I2C.
2008-12-09 FPD-Link II display Serdes overview
The FPD-Link II SerDes devices provide an embedded clock single serial stream for display, imaging, pixel based and other applications.
2003-09-12 FMA serdes Macro targets networking designs
Fujitsu Microelectronics America Inc. has introduced its 10Gbps serial transceiver macro, the HS9GX, for ASIC-based networking and comms apps.
2006-03-13 Fairchild ?SerDes in LG cellphones
Fairchild Semiconductor announced that its FIN24AC 5SerDes has been selected for use in LG Electronics' new "Chocolate" phones.
2006-09-01 Extending your reach with Serdes
Transceivers can incorporate highly flexible equalization circuits that extend the range and performance of high-speed serial links.
2010-07-05 Evaluating a Serdes chipset for optimal performance at various coax cable lengths
This application note presents test data showing that the MAX9259/MAX9269 Serdes chipset performs well and meets the device specifications with STP cables at various lengths.
2009-06-04 Electrical recommendations for Lattice Serdes
LatticeECP3, LatticeECP2/M and LatticeSC/M Serdes integrates high-speed, differential current mode logic (CML) input and output buffers. Off-chip signal interface design and characteristics are the focus of this application note.
2008-06-12 Dual-speed Serdes available for EPON terminals
Texas Instruments has introduced a low-power Serdes device that provides a fast relock time and supports a wide data bandwidth range from 1- to 2.6Gbit/s.
2002-06-28 Cypress samples SiGe SONET/SDH serdes
Cypress Semiconductor's CYS25G0102DX OC-48/STM-16 serdes is designed for use in OC-48/STM-16 switches, routers, DWDM systems and add/drop MUXs.
2006-09-20 CPRI Serdes delivers 800ps delay calibration accuracy
National said its new CPRI Serdes is the first to guarantee 800ps delay calibration measurement accuracy and exceed all CPRI interface signal voltage and jitter requirements.
2007-06-08 Compact Serdes boasts low power, saves board space
TI has rolled out the TLK1221 GbE Serdes, the industry's smallest low-power, single-channel interface device.
2008-05-12 CDR Serdes trims down cost, power use
By combining the functions of three ICs within a single, highly integrated device, the Maxim's MAX3886 CDR Serdes provides significant cost and power savings to manufacturers of PON equipment for the FTTH market.
2002-11-05 Broadcom serdes increases backplane speeds by 8x
The company's BCM8020 8-channel multirate and BCM8040 8-channel multirate retimer/switch devices increase transmission speed up to eight times.
2011-01-13 Basic test strategies, guidelines for EMI-/EMC-ready SerDes
Learn about the basic concepts and guidelines on how to prepare your SerDes system for EMI/EMC testing.
2015-01-15 Avago's 56Gbit/s PAM4 SerDes aims at routers, switches
Avago's latest SerDes utilises PAM4 with 56Gbit/s throughput. It can be used to design innovative ASIC SoC solutions and supports both copper and fibre optic interconnects.
2006-06-29 Avago unveils 65nm SerDes core
Avago Tech recently claimed it is among the first manufacturers to validate its serialization/deserialization IP core in 65nm CMOS process technology.
2004-04-13 Analogix offers new DSP-based serdes
Analogix Semiconductor is promoting DSP-based receiver techniques in a next-generation backplane serializer/deserializer for 5Gbps and 10Gbps systems.
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

Back to Top